Headline

Student | TPO Co-ordinator at DY Patil University

About

Proficient at thinking out-of-the-box and applying Data Science & AI/ML algorithms to application areas, like Business, Finance, Nutrition, Semiconductors. Strongly aligned with industry and business requirements and have work experience with technology leaders. I have a keen interest in problem solving and fields that demand us to apply our logical mind to reach a solution. I also have an interest in research work and diving deep into mind boggling topics that still appear incomprehensible even today.

Location

Pune District

AI stack

deepmind

hugging face

langchain

langgraph

langsmith

mcp

openai

Work experience

AIML - Project Executive at Silicon Interfaces, Navi Mumbai, Implemented Agent B2Cie™ (B2Cie.com) as a multi-modal, multi-lingual AI Education Agent with RAG architecture, integrated to communications gateways and workflow integration with shared memory interface and connectors to HRO Agent. • Responsible to develop:– RAG Modules– Course Materials in Statistics, Linear Programming, Models, Generative AI, and Python– Tutoring AI/ML to HNIs and Corporates in USA and India

Generative AI - Intern at L&T Technology Services, Jun 2025 - Dec 2025 · 7 mos, Mumbai, Maharashtra, India, • Engineered 7+ Generative AI and Agentic AI workflows for enterprise teams across 3 business units, automating data extraction, document understanding, and multi-step decision-making processes . • Designed a Smart AI Data Extraction System using LLMs, LangChain, and FastAPI, achieving 92% structured-extraction accuracy on large volumes of unstructured financial and operational documents; adopted as the base architecture for an enterprise-scale internal product and presented to the Nordic Region Head • Built end-to-end Agentic AI pipelines for automated document understanding across regulated-industry workflows, reducing manual review overhead and improving reliability of downstream decision-making • Designed controlled experiments benchmarking LLM output quality across structured vs. unstructured inputs at scale, applying systematic debugging to validate statistically reliable accuracy thresholds before production rollout

AIML- Intern at Silicon Interfaces, Jun 2024 - Aug 2024 · 3 mos, Mumbai, Maharashtra, India, Built an LSTM sequence model on structured financial time-series data, reducing multi-step forecasting error by 18% over a baseline moving-average model, benchmarking RMSE and MAE . • Designed a neural network to classify stuck-at faults from injected semiconductor test vectors, achieving 90%+ fault-classification accuracy and contributing to a published research paper • Identified optimal hyperparameter configurations by systematically testing ReLU/Sigmoid activations and RMSProp/Adam optimizers across 10+ configurations, generating structured experimental reports for senior researchers and engineering leads

Education

DY Patil University pune

Higher Secondary, Science, Don Bosco school Guwahati

Public links

github: https://github.com/Yeshee-30