---
title: "Vipasha Mittal - ASIC Design Engineer in Bengaluru | Tal"
description: "Meet Vipasha Mittal, ASIC Design @TI | SM, MIT | Silver Medalist, IIT Delhi based in Bengaluru. AI stack includes claude code, claude, and gemini."
image: "https://tal.club/meet/vipasha-mittal/share-image"
---

# Vipasha Mittal on Tal

## Headline

ASIC Design @TI \| SM, MIT \| Silver Medalist, IIT Delhi

## About

Passionate about low power circuit and system design\. Experienced in digital and analog circuit design, system modelling and validation I completed my masters in EECS from Massachusetts Institute of technology in 2021 and my BTech in Electrical engineering from IIT Delhi in 2018, where I was awarded the Institute silver medal and Prof CS Jha Memorial Award\. At MIT, I was a recipient of the Jacobs Presidential fellowship\. I deeply care about making technology accessible for all\. Outside of work, I love reading books, playing flute, travelling and writing\. \(I also have a small collection of poetry published, Aurora:Verses for the soul\) I am a strong proponent for diversity, especially for historically underserved groups\.

## Location

Bengaluru

## AI stack

claude code

claude

gemini

## Work experience

ASIC Design Engineer at Texas Instruments, Nov 2022 \- Present · 3 yrs 10 mos, Bengaluru, Karnataka, India, Currently working on algorithms and digital systems design for automotive SerDes applications\. \(April 2025 \- Present\) Previously in RF Amplifiers team: \(Nov 2022\- Mar 2025\) \- Worked on high speed front\-end wideband amplifiers for test and measurement applications\. \- Designed the end to end chain for a satellite communication receiver front end, from LNAs to fixed and variable gain amplifiers, current combiners and voltage drivers\. \- Designed and taped out a highly reconfigurable bias chip for a SiGe\-GaAs multi\-chip module\. \(including configurable temperature slopes across wide range of voltages and currents, high voltage V/I drivers\)\. \- Developed the architecture, designed and taped out a clockless temperature sensor, which is used in multiple products\. \- Enabled the flow of multi chip module simulations from scratch \(Virtuoso \- ADS\), enabling the team to simulate several MCM LNA front ends and identifying issues during design\. \- Worked extensively on understanding of phase noise, developing schemes and circuits for achieving extremely low phase noise LNAs for SDR\.

Research Intern \- Analog Design at MediaTek, Jun 2021 \- Aug 2021 · 3 mos, Woburn, Massachusetts, United States, Worked on high linearity analog front ends for sub\-6 GHz 5G and mmWave 5G technology with Dr Ayman Shabra\.

Research Assistant at MIT EECS, Sep 2018 \- Aug 2022 · 4 yrs, Cambridge, Massachusetts, United States, Worked on low power analog and mixed signal circuit design with Prof Hae Seung Lee and Prof Anantha Chandrakasan\. \- Developed the architecture, designed and taped out a thermal noise based temperature sensors\. Did extensive mathematical and system analysis to use statistical properties of transistor level thermal noise to measure temperature\. \- Worked on low power ultrasound imaging patches and on system modelling of ultrasound imaging\. \- Minored in Cognitive Neuroscience

Teaching Assistant at Indian Institute of Technology, Delhi, Aug 2017 \- May 2018 · 10 mos, Teaching Assistant for the course Analog Electronics in Fall 2017, and Introduction to Electrical Engineering in Spring 2018\.

Analog IC Testing Intern at Texas Instruments, May 2017 \- Jul 2017 · 3 mos, Bangalore, Worked on designing testing methodologies for high speed isolators and schemes for low jitter measurement

Research Assistant at Indian Institute of Technology, Delhi, Dec 2016 \- May 2018 · 1 yr 6 mos, Worked on iterative learning control with Prof Shouri Chatterjee\. Designed and taped out an iterative learning controller for regulating LDO voltage during load transients\. Developed the architecture of a configurable solar cell module for maximum power point tracking, using iterative learning control\.

## Education

Master of Science \(SM\), EECS, Massachusetts Institute of Technology

Bachelor of Technology, Electrical Engineering \(Power & Automation\), Indian Institute of Technology, Delhi

[View the original profile](https://tal.club/meet/vipasha-mittal)

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