Headline

Senior Staff at Samsung semiconductor india

About

Experienced Validation Engineer with a demonstrated history of working in the computer software industry. Skilled in Universal Verification Methodology (UVM), SystemVerilog, Open Verification Methodology, Functional Verification, and Verilog. Strong quality assurance professional with a Bachelor of Engineering (B.E.) focused in Electrical, Electronics and Communications Engineering from Uttar Pradesh Technical University.

Location

Greater Bengaluru Area

AI stack

anthropic apis

Work experience

Senior Staff Engineer at Samsung Semiconductor, Mar 2023 - Present · 3 yrs 9 mos, India

Staff Engineer at Samsung Semiconductor, May 2021 - Mar 2023 · 1 y 10 mo, Bengaluru, Karnataka, India

Senior Verification Engineer at SeviTech Systems Pvt. Ltd., Jun 2018 - May 2021 · 3 yrs, Bengaluru Area, India

Verification Engineer II at Mindlance Technologies, Mar 2016 - Jun 2018 · 2 yrs 4 mos, Bengaluru, Karnataka, India

Verification Engineer at SmartDV Technologies India Private Limited, May 2014 - Feb 2016 · 1 yr 10 mos, Bangalore

Education

Bachelor of Engineering (B.E.), Electronic and communication engineering, Motivational pathway

12th, Science, Jamuna Christian Inter College, Allahabad, India