Senior Physical Design Engineer @ Quest-Global

Bengaluru, Karnataka, India
Greater Bengaluru Area
Bangalore

Banglore

Banglore





Bachelor of Engineering - BE, Electronics and Communications Engineering
Visvesvaraya Technological University
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Senior Engineer at Quest Global, Jan 2025 - Present · 1 yr 10 mos, Bengaluru, Karnataka, India
Design Engineer 2 Physical Design at SignOff Semiconductors, Jul 2024 - Feb 2025 · 8 mos, Greater Bengaluru Area
Design Engineer 1 Physical Design at SignOff Semiconductors, Jun 2022 - Feb 2025 · 2 yrs 9 mos, Bangalore, Place • Route • Tapeout • Repeat
Engineering Trainee at OpenFive, Nov 2021 - Jun 2022 · 8 mos, Banglore, I performed PnR flow on 2 blocks working on a live project on 6nm technology node Exercising Floorplan activity for better utilisation Analysing timing reports Cleaning DRC's Design Closure
Internship Trainee at ChipEdge Technologies Pvt Ltd, Oct 2020 - Mar 2021 · 6 mos, Banglore, Performed P&R on blocks in Synopsys 28nm technology. Exercise on optimizing floorplan and routing congestion. Increasing design frequency by analyzing and resolving critical timing violations ECO Flow Implementation. Static Timing Analysis and Physical Verification (DRC/LVS). Basic Scripting in BASH, Tcl and Perl. Good Understanding of Physical Design, Static Timing Analysis and Physical Verification. Familiar with Synthesis, Timing constraints, LEC, DRCs and ECO Flow.
Bachelor of Engineering - BE, Electronics and Communications Engineering, Visvesvaraya Technological University