---
title: "Vadla Hari Sai Sankar - Member in Pulivendla | Tal"
description: "Meet Vadla Hari Sai Sankar, B.Tech ECE (IIoT) ’27 @ NIT Kurukshetra | VLSI | RTL & Digital Design | Verilog | FPGA based in Pulivendla. AI stack includes hugging face, ollama, and openai. Explore public work links including github."
image: "https://tal.club/meet/vadla-hari-sai-sankar-1/share-image"
---

# Vadla Hari Sai Sankar on Tal

## Headline

B\.Tech ECE \(IIoT\) ’27 @ NIT Kurukshetra \| VLSI \| RTL & Digital Design \| Verilog \| FPGA

## About

I’m a B\.Tech ECE \(IIoT\) student at NIT Kurukshetra, focused on VLSI and digital design with an emphasis on RTL development\. I have experience working with Verilog and FPGA\-based systems, with a strong understanding of RTL design, simulation, and hardware architecture\. I’m comfortable analyzing dataflow, timing behavior, and making design trade\-offs that impact performance and resource utilization\. I’m particularly interested in digital design, computer architecture, and building efficient, high\-performance hardware systems, with a focus on strengthening fundamentals and approaching problems from a design\-first perspective\. Currently seeking VLSI/digital design internship opportunities and open to connecting with professionals in this space\.

## Location

Pulivendla

## AI stack

hugging face

ollama

openai

replit

## Work experience

Member at NSS NIT Kurukshetra, Aug 2024 \- Present · 1 yr 10 mos, Kurukshetra, Haryana, India

## Education

Bachelor of Technology \- BTech, Industrial Internet of Things\(IIoT\), National Institute of Technology, Kurukshetra, Haryana

Mathematics, Sri Chaitanya College of Education

## Public links

- github: https://github\.com/sankar\-vadla

[View the original profile](https://tal.club/meet/vadla-hari-sai-sankar-1)

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