---
title: "Twaheer N - Analog Design Engineer in Bengaluru | Tal"
description: "Meet Twaheer N, Design verification engineer based in Bengaluru. AI stack includes claude."
image: "https://tal.club/meet/twaheer/share-image"
---

# Twaheer N on Tal

## Headline

Design verification engineer

## About

As an electronics engineer with a strong interest in analog circuit design, I have practical experience creating, modeling, and evaluating analog systems with programs like Multisim, Cadence, and LTspice\. I recently finished my internship at Saksham Semiconductors, where I worked on the basics of analog layout, biasing techniques, and operational amplifiers\. I'm currently honing my skills in VLSI analog design and getting ready for technical interviews and practical design problems\. My objective is to work as an Analog Design Engineer on advanced analog integrated circuits or mixed\-signal systems for a major electronics company\.

## Location

Bengaluru

## AI stack

claude

## Work experience

Analog Design Engineer at Saksham Semiconductors, Mar 2025 \- May 2025 · 3 mos, Learned the basics of analog circuit design including amplifiers and filters\. Worked on creating and testing analog circuits using Cadence Virtuoso\. Performed simulations like DC and AC analysis to check circuit performance\. Gained hands\-on experience with layout and checking tools like LVS and DRC

Design Engineering Intern at Rooman Technology, Oct 2024 \- Feb 2025 · 5 mos, Gained hands\-on experience in VLSI design, RTL coding, and verification methodologies\. Designed and implemented Verilog\-based RTL designs using Cadence and Vivado tools\. Performed timing analysis, synthesis, and simulation of digital circuits\. Worked on SystemVerilog and UVM to develop efficient verification testbenches\.

## Education

Bachelor of Engineering \- BE, Electronics and communication, AGM Rural College of Engineering & Technology, VARUR

XII \(CBSE\), SJR

[View the original profile](https://tal.club/meet/twaheer)

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