sushanta biswasarma
Student at PSG College of Technology
Coimbatore
6+ years of work experience
Jul 20233 yrs 3 mosPresent
Raurkela
rtl design and verification dft insertion logic synthesis timing analysis layout design and post layout timing analysis drc lvs check parasitics extraction for a complete soc including RV32IM RISC-V Processor for an soc(ISRO Sponsored project) phase locked loop for 100MHZ clock generation for the soc schematics simulation and complete layout design two stage opamp pipeline ADC bandgap reference circuit current mirror gain boosted telescopic and folded cascode opamp
Sep 202211 mosJul 2023
Bengaluru
rtl design and verification for different communicating bus protocols including ethernet, cpri, pcie, AHB, APB, AXI, SPI, I2c
Feb 20202 yrs 7 mosAug 2022
hyderabad
Feb 20202 yrs 7 mosAug 2022
Hyderabad, Telangana, India
design and verification work for bus protocol like I2C & SPI also working on various pll design including phase detector low pass filter and different kind of oscillators
Jan 20192 mosFeb 2019
Tirupati, Andhra Pradesh, India
worked as a vlsi intern(logarithmic multiplier)
sushanta’s AI Stack
Education
Master of Technology, vlsi design
PSG College of Technology
20162 yrs2018
Master of Engineering - MEng, vlsi design
PSG College of Technology
20162 yrs2018
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