Senior Technical Lead and Software Architect with 18 years of experience building real-time and safety-critical systems in C and modern C++(C++14/17/20) across aerospace, automotive radar, semiconductor test and defence.

Bengaluru, Karnataka, India

Bangalore Urban, Karnataka, India

Greater Bengaluru Area

Bangaon Area, India

bangalore
bangalore

bangalore





Masters, Computer Science
Reva University

Bachelor of Engineering (BE), Electronics and communication
Kongu Engineering college
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Download Tal BossSenior Technical Lead and Software Architect with 18 years of experience building real-time and safety-critical systems in C and modern C++(C++14/17/20) across aerospace, automotive radar, semiconductor test and defence.
Senior Technical Lead and Software Architect with 18 years of experience building real-time and safety-critical systems in C and modern C++ (C++14/17/20) across aerospace, automotive radar, semiconductor test and defense. • Leadership: Led teams of up to 9 engineers with full people management; Certified ScrumMaster for a 19-member team at Intel • Architecture: Defined the RSP → EM → FCT radar processing architecture at Continental, with EKF-based multi-target tracking achieving fewer than 3 false positives per million km • Software engineering: Object-oriented design with GoF design patterns (Factory, Observer, Visitor, Singleton); multithreading, concurrency and inter-thread communication; inter-process communication (IPC) via message queues and sockets • Systems and platforms: Built Intel’s TOS test OS and a memory-swapping algorithm that delivered 20% faster test runs; virtualized radar servers on Linux with KVM/QEMU and libvirt, cutting VM setup from days to hours • Domains and standards: Boeing 777 and Embraer E2 avionics; ISO 26262 (ASIL-B) safety requirements; DO-178B; Euro NCAP, JNCAP and C-NCAP; VxWorks and DEOS RTOS
Greater Bengaluru Area
claude code
claude
gemini
github copilot
Senior Tech Lead at Thales, Feb 2026 - Oct 2026 · 9 mos, Bengaluru, Karnataka, India, MLAT ADSP – Secondary Surveillance Radar. Virtualized radar processing servers on Linux using KVM/QEMU, libvirt and virtio, provisioning VMs for multiple subsystems. Designed host–VM network topology: NIC bonding, Linux bridges, macvtap/macvlan and netplan configuration. Built data-driven provisioning automation in Python, Bash and YAML, reducing VM setup time. Developed MAGS software components in modern C++ and configured SNMP-based monitoring
System Software Development Engineer at Intel Corporation, Jul 2021 - Oct 2025 · 4 yrs 4 mos, Bangalore Urban, Karnataka, India, Proprietary OS Development – DFT (Design for Test): Led the development of TOS, a proprietary Intel operating system built in C++14, C++17 on windows visual studio, Multi threading, This OS was critical for the comprehensive testing and validation of next-generation processors across multiple product lines. Core System Engineering: Engineered the Bottomless Vector Memory Swapping Algorithm for the HDBI/HDMT platforms, showcasing advanced technical expertise in memory management and system optimization. Processor Validation & Testing: Worked extensively with HDMT and HDBI (High-Density Burn-In testers) to conduct multi-generation processor validation, ensuring product quality and reliability. Technical Contributions: Actively contributed to the core functionalities of the operating system, including pattern modification, cache optimization, and the development of memory management algorithms. Certified Scrum Master: Served as a Certified Scrum Master, overseeing sprint execution and the timely delivery of project milestones to ensure team productivity and alignment with business goals. Agile Ceremony Facilitation: Facilitated key Agile ceremonies—daily stand-ups, sprint planning, and retrospectives—to foster effective communication, promote continuous improvement, and ensure the team's ability to adapt and deliver high-quality results.
Senior Technical Architect at Continental, Jan 2020 - Jul 2021 · 1 yr 7 mos, Greater Bengaluru Area, Defining architecture for generation 6 continental radar Srr6xx. Defining interfaces L2 and L3 base and customer requirements handling. C++14, Algorithm development. Technical management. Served as the EM Delegate for the ARS510TA19 Toyota customer project, focusing on false-positive analysis and meeting TMC-specific requirements for NCAP 2018 and 2020 KPI achievements. PCC Classification: Responsible for PCC (Pedestrian and Bicycle) classification and object detection. Algorithm Development: Developed algorithms for Object Detection and the data processing unit for the ARS400 Series as a base for EM models. Requirement Engineering: Led requirements engineering for Geely customers in China for their sensorics product line. Ghost Object Detection: Served as the Technical Lead for the Ghost Object Detection algorithm development for the Daimler customer ARS441 Premium sensors. Component Ownership: Held Component Ownership for EMCLASSIC_V6 ARS400 series, leading a team of 9 members and people management.
Technical Architect at Continental, Jan 2019 - Jan 2020 · 1 yr 1 mo, Bangaon Area, India, Object Detection and NCAP 2018 and NCAP 2020 KPI Performance development for Object Detection and Pedestrians Classification. Team Handing of Object detection/PCC for different projects. C++14, Algorithm development. Technical management.
Senior Technology Specialist at Continental, Jan 2018 - Jan 2019 · 1 yr 1 mo, bangalore, • Algorithm Development – Object Detection and data Processing unit for ARS400 Series Base development for EM models. • Requirement Engineering for Geely Customers in China for the sensorics product line. ADAS (Self Driving cars),
Senior Software Engineer at Honeywell Technology Solutions, Inc., Jun 2014 - Dec 2016 · 2 yrs 7 mos, bangalore, Worked as a senior software engineer for condition-based maintenance (CBM), CMCF central maintenance computing function. CBM-Condition Based Maintenance for Aircraft. C, C++ Development for CMCF CBM on DEOS RTOS Platform. Developed the Central Maintenance Computational Function (CMCF) software for aircraft, which acts as a centralized display and control system. The software collects Built-in-Test (BIT) results from individual Member Systems, providing a single user interface to display test results, initiate new tests, and manage file transfers within the aircraft.
TPS engineer at Axis Aerospace & Technolgies Private Limited, Jul 2012 - Jun 2014 · 2 yrs, bangalore, Experienced in Automated Test Equipment development and TPS development for THALES System Aeroportes. worked in France Pessac TSA location for Development of TPS and Interface Development using C and Labwindow cVI for one year. Experienced on VxWorks RTOS.
Masters, Computer Science, Reva University
Bachelor of Engineering (BE), Electronics and communication, Kongu Engineering college