---
title: "Sridhar Yc - Supply Chain Configuration Management Leader in India | Tal"
description: "Meet Sridhar Yc, Component Engineering, Commodity Management, Quality & Reliability, Semiconductor Fabrication. component Qualification, Part life cycle management, product cost cutting based in India. AI stack includes deepseek, gemini, and Firecrawl."
image: "https://tal.club/meet/sridhar-yc/share-image"
---

# Sridhar Yc on Tal

## Headline

Component Engineering, Commodity Management, Quality &amp; Reliability, Semiconductor Fabrication\. component Qualification, Part life cycle management, product cost cutting

## Location

India

## AI stack

deepseek

gemini

Firecrawl

LlamaIndex

## Work experience

Supply Chain Configuration Management Leader at Aptiv, Jul 2026 \- Present · 3 mo, Bangalore

Lead Hardware Component Owner at Volvo Group, Aug 2023 \- Jul 2026 · 2 y 11 mo, Bangalore Urban, End\-to\-End Program Ownership: Lead complex, multidisciplinary engineering programs as an EPIC Owner, managing technical scope, timelines, and cross\-functional execution tracks across engineering, manufacturing, quality, and purchasing to deliver advanced hardware/ECU platforms\. Roadmap Alignment &amp; Execution: Plan and track milestone dependencies for next\-generation system architectures; authored technical regulations \(TR\) and drove requirements analysis to achieve a 15\-20% reduction in time\-to\-market while guaranteeing 95% alignment with long\-term product roadmaps\. Risk Mitigation &amp; Issue Resolution: Lead technical deep dives and failure analysis \(DFMEA, 8D root\-cause investigations\), identifying critical path blockers early to deliver a 20\-30% reduction in defects and 40% faster cycle resolution\. Strategic Partner Governance: Manage end\-to\-end partner/supplier lifecycles \(RFI/RFQ, development tracking, and sustaining activities\), driving data\-backed trade\-offs that resulted in 10\-15% annual cost efficiencies and optimized supply integrity\. Release &amp; Configuration Management: Oversee release management infrastructure \(DCNS, BOM development\), ensuring silicon\-adjacent sub\-systems met complex quality, reliability, and technical configuration standards\.

Technical Lead at Aptiv, Apr 2023 \- Aug 2023 · 5 mos, Bengaluru, Portfolio &amp; Lifecycle Governance: Program\-managed semiconductor and component portfolio lifecycles across multiple concurrent product lines, proactively analyzing obsolescence risks and providing critical roadmap guidance to hardware and software engineering teams\. Silicon Quality &amp; Compliance Tracking: Managed supplier synchronization and validation processes \(APQP, FA/8D reviews, CAPA implementations\) to enforce AEC\-Q qualification and PPAP compliance, achieving a 95%\+ quality and 95% on\-time milestone delivery record\. Cross\-Functional System Collaboration: Partnered with global technical leads, architectural stakeholders, and external clients to align semiconductor technology roadmaps, resolve complex multi\-site technical issues, and guide chip/component selections\. Financial &amp; Trade\-Off Matrix Leadership: Orchestrated alternate component sourcing and cost improvement projects \(CIP\), executing data\-justified technical trade\-offs to yield $500K–$1\.2M in annual savings while mitigating stockout exposures\. Process Standardization: Spearheaded continuous improvement initiatives that modernized risk assessment velocity, shortening SCR engineering review and validation times by 30%\.

Advance Component Engineer at Aptiv, May 2019 \- Mar 2023 · 3 yrs 11 mos, Greater Bengaluru Area, Portfolio &amp; Lifecycle Governance: Program\-managed semiconductor and component portfolio lifecycles across multiple concurrent product lines, proactively analyzing obsolescence risks and providing critical roadmap guidance to hardware and software engineering teams\. Silicon Quality &amp; Compliance Tracking: Managed supplier synchronization and validation processes \(APQP, FA/8D reviews, CAPA implementations\) to enforce AEC\-Q qualification and PPAP compliance, achieving a 95%\+ quality and 95% on\-time milestone delivery record\. Cross\-Functional System Collaboration: Partnered with global technical leads, architectural stakeholders, and external clients to align semiconductor technology roadmaps, resolve complex multi\-site technical issues, and guide chip/component selections\. Financial &amp; Trade\-Off Matrix Leadership: Orchestrated alternate component sourcing and cost improvement projects \(CIP\), executing data\-justified technical trade\-offs to yield $500K–$1\.2M in annual savings while mitigating stockout exposures\. Process Standardization: Spearheaded continuous improvement initiatives that modernized risk assessment velocity, shortening SCR engineering review and validation times by 30%\.

Mems engineer at Semiconductor technology and applied research center, Sep 2014 \- 2019 · 4 yrs 5 mos, India, R&amp;D Silicon/Sensor Delivery: Spearheaded system\-level testing, characterization, and production programs for custom MEMS\-based silicon architectures \(sensors and RF devices\) utilized in mission\-critical aerospace \(LCA TEJAS\) and biomedical platforms\. Fabrication &amp; Cleanroom Operations Management: Directed custom wafer fabrication workflows, supervising crucial engineering phases including Diffusion, Chemical Vapor Deposition \(CVD\), and metal alloying; engineered optimization fixes for technical bottlenecks to guarantee predictable wafer output\. Advanced Reliability Modeling: Conducted comprehensive chip reliability testing, qualification matrices, and mathematical failure modeling \(MTBF via MIL\-HDBK\-217F, FMEA/FMECA\) to validate hardware resilience against harsh environmental boundaries\. Program Artifacts &amp; Metrics Owner: Acted as Production &amp; Quality Lead; developed high\-fidelity technical documentation, BOM specifications, process architecture maps, and Gantt milestone charts to coordinate deliverables smoothly between engineering divisions and external OEMs\.

## Education

Bachelor of Engineering \- BE, Electrical, Electronics and Communications Engineering, Visvesvaraya Technological University

[View the original profile](https://tal.club/meet/sridhar-yc)

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