Electronics & Communication Engineering Student | Verilog • RTL Design • FPGA • Digital Design | Exploring AI/ML




Bachelor of Technology, Electrical, Electronics and Communications Engineering
Parul University
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Download Tal BossElectronics & Communication Engineering Student | Verilog • RTL Design • FPGA • Digital Design | Exploring AI/ML
I'm an Electronics and Communication Engineering student at Parul University with a strong interest in digital design, computer architecture, and semiconductor engineering. I'm currently building a public portfolio of Verilog RTL projects to strengthen my understanding of hardware design—from basic combinational circuits to processors and FPGA development. Alongside hardware, I'm also exploring AI/ML and enjoy solving engineering problems through hands-on projects. I'm always looking to learn, collaborate, and grow as an engineer.
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Bachelor of Technology, Electrical, Electronics and Communications Engineering, Parul University
github: https://github.com/snehulmistry