---
title: "Shreyash J. Dabawala - Sr. Lead Engineer in Bengaluru | Tal"
description: "Meet Shreyash J. Dabawala, RF / Wireless based in Bengaluru. AI stack includes claude code, claude, and github copilot."
image: "https://tal.club/meet/shreyash-dabawala/share-image"
---

# Shreyash J\. Dabawala on Tal

## Headline

RF / Wireless

## About

Senior RF/Wireless Validation Engineer with 9\+ years of experience in RF system validation, wireless connectivity, PHY characterization, and silicon bring\-up across Wi\-Fi, UWB, and automotive radio platforms\. Experienced in validating and optimizing RF transceiver performance for Wi\-Fi \(IEEE 802\.11 b/g/n/ac/ax\), UWB \(IEEE 802\.15\.4ab/z, FiRa\), and FM/AM radio systems, with strong expertise in RF measurements including Sensitivity, EVM, Noise Figure, AGC, IM3/IP3, Blocker, Phase Noise, Spectrum Mask, Tx Power, and Dynamic Range\. Hands\-on experience in end\-to\-end silicon validation, RFIC characterization, conducted RF setup bring\-up, PHY layer debugging, AGC optimization, and PVT characterization\. Proven track record of improving wireless system performance, enabling feature validation, and driving issues to closure in cross\-functional environments\. Skilled in Python, MATLAB, C\#, and LabVIEW for RF test automation, data analysis, and validation framework development\. Passionate about solving complex wireless system challenges and contributing to next\-generation RF and connectivity technologies\. Currently focused on RF Validation, UWB/Wi\-Fi systems, wireless PHY performance, and scalable test &amp; measurement solutions\.

## Location

Bengaluru

## AI stack

claude code

claude

github copilot

langchain

ollama

## Work experience

Sr\. Lead Engineer at NI \(National Instruments\) \- Emerson, Nov 2024 \- Present · 1 yr 11 mos, Bengaluru, Karnataka, India

Lead System Validation Engineer at NXP Semiconductors, Dec 2020 \- Nov 2024 · 4 yrs, Bengaluru, Karnataka, India, Simulated UWB chipset \(Helios\-1\) receiver chain in MATLAB; Optimized AGC algorithm with gain statistics \(settled gain, settling time, gain error, table selection\)\. Corrected sensitivity measurements \(Improved UWB sensitivity by 2–3 dB through PHY layer tuning; corrected error floor and monotonicity issues in MATLAB test framework\), developed and executed Tx/Rx validation including NBIC \(Narrow Band Blocker\) feature tests\. Supported UWB silicon bring\-up and PHY layer characterization to improve sensitivity \(BER\) performance\. Owned end\-to\-end validation lifecycle for FM/AM Analog Radio receivers \(3 chipsets\) \(automotive infotainment\): built conducted RF setups, powered on silicon, performed sanity checks, executed measurement cycles, and debugged issues to closure\. Executed comprehensive RF receiver measurements: Sensitivity, Noise Figure, Selectivity, Desensitization, Linearity, IP3, AGC, IM3, Blocker, THD\+N, SNR, AGC Steps and Attack/Decay Time Constants\. Enabled and tuned Channel Equalizer and Phase Diversity at firmware level; implemented and characterized AGC algorithms for FM receiver chain optimization\. Led PVT \(Process, Voltage, Temperature\) characterization across all chipset corner samples; supported legacy Car Radio customer requirements ensuring backward compatibility\. Mentored 3 Engineers on validation frameworks and debugging; automated report generation using Python and MATLAB, reducing manual effort and turnaround time \(Reduced report generation time by \~50% via Python/MATLAB automation\)\.

RF VALIDATION ENGINEER at Broadcom Inc\., Jun 2017 \- Nov 2020 · 3 yrs 6 mos, bangolore, Performed RF validation of Wi\-Fi modules \(Validated 3 generations of Wi\-Fi modules across 4 WLAN standards\) for smartphones: PA, LNA, T/R switch characterization per IEEE WLAN 802\.11 b/g/n/ac/ax standards\. Built and calibrated validation stations from scratch; executed RF parameter measurements \(EVM, Sensitivity, TX/RX Throughput, Tx Power Control, Spectrum Mask, PER/BER, IQ Mismatch\) on Wi\-Fi/BT combo platforms\. Validated advanced features: Scan Core, Tx Beamforming; generated industry\-standard validation reports for design and system team using Python Framework\.

## Education

Master of Technology \- MTech, Electrical, Electronics and Communications Engineering, Nirma University

Diploma, polytechic, Maharaja Sayajirao University of Baroda, Vadodara

[View the original profile](https://tal.club/meet/shreyash-dabawala)

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