Headline

Aerospace & Defence Electronics Engineer|Senior Design Engineer | Mission-Critical Hardware| High-Speed Digital, RF & Power Electronics | Embedded Hardware | HDI | DDR/PCIe | EMI/EMC | Signal Integrity | Altium | Allegro

About

I’m a passionate and results-driven Senior PCB Design Engineer with over 6 + years of experience in high-speed, high-density, and mixed-signal PCB designs across consumer electronics, RF, computing hardware, and power systems. 🔄 End-to-End PCB Expertise From schematic capture to production-ready Gerbers, I specialize in multi-layer (up to 24 layers) and HDI PCB design using blind/buried vias and microvias, ensuring compliance with IPC Class II/III standards. I integrate SI/PI analysis, EMC guidelines, and DFM/DFT practices for efficient and reliable outcomes. 🚀 High-Speed Design I’ve designed boards for DDR3/DDR4, PCIe, USB, and Ethernet protocols with expertise in impedance control, length matching, and differential pair tuning. Skilled in collaborating with SI teams for GHz-level trace simulation and layout optimization — often in tight form-factor constraints with FPGA and SoC integrations. 🎛 Mixed-Signal Systems Adept at analog/digital/RF partitioning, I’ve worked on boards combining ADC/DACs, RF front-ends, and analog circuits — managing crosstalk, grounding, and filtering strategies to ensure precision and stability. ⚡ Power Board Design Experienced in designing buck, boost, buck-boost regulators, LDOs, and isolated power domains with a strong focus on ripple suppression, thermal management, and creepage/clearance compliance per IPC-2221 & IPC-9592. 🛠 Tools & Methodologies CAD Tools: Cadence Allegro, Altium Designer, Mentor Xpedition, OrCAD Simulation: HyperLynx, LTspice, PI/SI modeling Workflows: DRC/DFM/DFT checks, BOM optimization, version control, design reviews 🤝 Collaboration & Execution I thrive in cross-functional teams, working closely with hardware, firmware, mechanical, and manufacturing engineers. Whether it's achieving first-pass success or tackling a complex board challenge, I bring precision, collaboration, and innovation to every project.

Location

Bengaluru

AI stack

notion

obsidian

ollama

openai

Work experience

Senior Research And Development Engineer at Rossell Techsys Limited, May 2026 - Present · 3 mos, Greater Bengaluru Area

PCB layout Design Engineer at Capgemini Engineering, Apr 2024 - Apr 2026 · 2 yrs 1 mo, Bengaluru, Karnataka, India, >Designed compact HDI boards with blind/buried vias and microvias for BGA packages in tight layouts. >Routed high-speed signals for FPGA, RF, and SoC systems following DRC/DFM and IPC Class II/III standards. >Reduced board area by 30% through optimized placement and via strategy without compromising EMI or thermal performance. >Collaborated on SI constraints, including differential pair tuning and length matching for DDR, PCIe, and USB. >Developed power supply boards with LDOs, switching regulators, and isolation techniques per IPC-2221. >Supported DFM/DFT reviews, vendor communication, and ensured manufacturability.

PCB layout Design Engineer at INVECAS, Aug 2022 - May 2024 · 1 yr 10 mos, Hyderabad, Telangana, India, >Delivered 18-layer HDI PCBs for RF/GPS/Bluetooth applications with tight layout and form-factor constraints. >Worked with RF and mechanical teams to resolve integration and placement issues. >Led SI/PI checks and pre-layout simulation for power and RF signals. >Implemented PDN strategies to reduce EMI, crosstalk, and rail instability. >Routed high-current nets using thermal reliefs and split planes for better thermal and electrical performance. >Supported package integration and contributed to documentation.

PCB layout Design engineer at Intel Corporation from Wipro technologies at Wipro, Oct 2020 - Jun 2022 · 1 yr 9 mos, Bengaluru, Karnataka, India, • Contributed to layout of high-speed PCBs (up to 24 layers) for motherboards and graphics cards. • Designed controlled impedance traces for DDR4, PCIe Gen III, USB3, and HDMI. • Collaborated with electrical engineers on SI/PI validation and power distribution. • Customized DRC rules and enhanced design cycle efficiency by reducing layout errors. • Generated manufacturing files including Gerber, pick-and-place, and assembly docs.

PCB DESIGN ENGINEER at DATASHRUBS, Feb 2019 - Aug 2020 · 1 yr 7 mos, Bengaluru, Karnataka, India, > Expertise In Allegro , Altium & Mentor Xpedition. > Designed up-to 16 layers with different kind of placement and routing guidelines. > Good knowledge in Power Supply Design and Power planes requirements. > Good knowledge in Mixed PCB design, floor planning, placement, impedance control and routing. > Worked projects with various interfaces like DDR2, DDR3 PCIe, NAND, eMMC, HDMI, USB3, C-TYPE,SRAM and ETHERNET. > Expertise in Gerber verification

Education

Bachelor of computers -BCA, bangalore university

Diploma, Electrical and Electronics Engineering, Dept of Technical Education