Headline

Design Verification Engineer @ AMD | SystemVerilog, Perl, CPP

About

I am a Design Verification Engineer at AMD, working in the feature verification team in the DV domain. I've done my bachelors in ECE from PVPSIT and have gone through training in VLSI from Veda IIT, which gave me the foundation and skills to pursue my passion for quality and functionality in semiconductor products. In my current role, I use SystemVerilog, Perl, and CPP to verify the various bus protocols and test the IP features for the next-generation server chips. I have been involved in projects that require me to write test plans, test cases, test benches, and debug scripts, as well as collaborate with the design and firmware teams to ensure the compliance and correctness of the specifications. I am motivated by the challenge and satisfaction of delivering high-performance and reliable products to AMD's customers.

Location

Krishna

AI stack

claude code

claude

codex

gemini

openai

Work experience

Design Verification Engineer at Soctronics, Apr 2023 - Present · 3 yrs 8 mos, Hyderabad, Telangana, India, Working in feature verification team in DV domain.

Education

Training, VLSI, Veda IIT

Bachelor's degree, Electronics and Communication Engineering, Prasad V Potluri Siddhartha Institute of Technology