---
title: "Sangeeth Madhav T - V&V Engineer Trainee in Ottappalam | Tal"
description: "Meet Sangeeth Madhav T, Electronics and Communication Engineering Graduate | Minor in Machine Learning | Ex-Intern at CDAC | Ex-Intern at IIT Palakkad | Tech Enthusiast-Exploring the future of Semiconductor Technology. based in Ottappalam. AI stack includes deepseek, gemini, and notebooklm."
image: "https://tal.club/meet/sangeeth-madhav-t/share-image"
---

# Sangeeth Madhav T on Tal

## Headline

Electronics and Communication Engineering Graduate \| Minor in Machine Learning \| Ex\-Intern at CDAC \| Ex\-Intern at IIT Palakkad \| Tech Enthusiast\-Exploring the future of Semiconductor Technology\.

## About

Electronics and Communication Engineering graduate with hands\-on experience in embedded systems, FPGA design, and software development\. I enjoy working across both hardware and software — from microcontrollers and digital logic to Python, C, and web technologies\. I’ve worked with Arduino, ESP boards, PYNQ\-Z1, and basic RTOS concepts, along with FPGA tools like Vivado and Vitis\. During my internship at CDAC Trivandrum, I worked as a Web Development Intern and also gained exposure to India’s indigenous VEGA RISC\-V processor ecosystem\. At IIT Palakkad, I worked as a Project Intern on the FPCA algorithm and its FPGA implementation on ZedBoard, combining HDL design, toolchain flows, and programming in Python and C\. Open to opportunities in embedded systems, IoT, FPGA, and software/IT roles where I can learn, build, and contribute\.

## Location

Ottappalam

## AI stack

deepseek

gemini

notebooklm

Canva Magic Studio

ChatGPT

Figma Make

## Work experience

V&V Engineer Trainee at BTL India Private Ltd, Apr 2026 \- Present · 6 mos, Bengaluru, Karnataka, India

Project Intern at IIT Palakkad\-SATCARD \(Smart AgriTech Centre for Advanced Research and Development\), May 2024 \- Apr 2025 · 1 yr, Palakkad, Kerala, India, •Gained theoretical and practical experience in the field of Deep learning and studied the Federated PCA Algorithm\. •Implemented and simulated the results of the algorithms of FPCA, researching on more papers published for the betterment of the Federated Learning concept\. •Worked on a FPGA based Hardware Accelerator Project for the implementation of FPCA Algorithm\.

Activity Head at Celestia NSSCE, May 2024 \- Apr 2025 · 1 yr, Palakkad, Kerala, India

Secretary at ELACSTA NSSCE, Apr 2024 \- Apr 2025 · 1 yr 1 mo, Palakkad, Kerala, India

Chairman \- Students Forum NSSCE at IETE, Nov 2023 \- May 2026 · 2 yrs 7 mos, Palakkad, Kerala, India, Selected as the Chairman of the IETE Students Forum of NSS College of Engineering\.

Tech Head at ELACSTA NSSCE, Apr 2023 \- Apr 2024 · 1 yr 1 mo, Palakkad, Kerala, India

## Education

Bachelor of Technology \- BTech\(Major\), Electronics and Communication Engineering, NSS College of Engineering, Palakkad

Minor Degree, Computer Science and Engineering\( Machine Learning \), NSS College of Engineering, Palakkad

[View the original profile](https://tal.club/meet/sangeeth-madhav-t)

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