Headline

Software Engineer @ UST | B.Tech, Executive MBA

About

6.10+ years of experience across Control System SW, GPU and GNSS domain, delivering high-impact solutions at UST. Adept at translating technical challenges into actionable product outcomes—owning debugging, feature rollouts, and cross-functional collaboration. Trusted by leadership for high-velocity delivery, cross-team alignment, and process optimization. Strong grounding in hardware-software systems, now pivoting to tech-driven product management with a builder mindset and delivery excellence. I have an educational background in Electronics and Telecommunication Engineering, with a B.Tech from Kalinga Institute of Industrial Technology and an Executive MBA from Dayananda Sagar University. I have also earned multiple certifications from Atlassian and Google to enhance my skills and knowledge. I value teamwork, innovation, and quality in my work, and I strive to deliver optimal solutions for my customers.

Location

Bengaluru

AI stack

claude code

ChatGPT

Luma AI

Microsoft Copilot

Work experience

Control System Software Engineer at UST, Mar 2025 - Present · 1 yr 6 mos

GPU Software Engineer at UST, Mar 2022 - Mar 2025 · 3 yrs 1 mo

Graphic Engineer at Intel, Mar 2022 - Feb 2025 · 3 yrs, Production driver defect resolution for the Intel Graphics Driver on Windows across multiple GPU/SoC platforms. Debugged and resolved production-level defects in the Intel Graphics Driver for Windows, sustaining driver stability and performance for millions of end-users across diverse hardware SKUs. Executed Kernel-Mode Debugging (KMD) workflows in WinDbg to replicate, root-cause, and fix complex display defects, achieving a 95% resolution rate across assigned issue queues. Diagnosed signal and enumeration failures across DisplayPort, HDMI, Embedded DP, USB Type-C, and Thunderbolt links, including HDCP authentication, FEC, and DPCD register-level analysis. Applied deep knowledge of the display pipeline — pipe/plane architecture, Multi-Plane Overlay (MPO), Panel Self-Refresh (PSR), and NV12 color formats — to isolate compositor and timing-domain defects. Performed register-level inspection over I2C and SPI during driver bring-up and panel/sink debug. Contributed to board bring-up, bug triage, and new driver feature development, owning defects through the full lifecycle from reproduction to patch verification. Reduced code merge conflicts ~30% by standardizing Git branching and code-review hygiene across the team. Led Knowledge Transfer (KT) sessions to onboard new engineers onto the KMD codebase and debug toolchain.

Software Engineer at L&T Technology Services, Jun 2019 - Mar 2022 · 2 yrs 10 mos, Bengaluru, Karnataka, India, Embedded GNSS/GPS subsystem development & debug on Android-based mobile platforms (Android Q / R / S). Refactored and modularized legacy embedded C code across GPS/GNSS subsystems, reducing technical debt by ~40% and improving long-term maintainability. Resolved defects across position estimation, signal acquisition, and tracking loops on Android Q/R/S platforms using systematic, log-driven debugging. Implemented and validated against 3GPP-compliant SUPL (User Plane & Control Plane), OTDOA, and LPP protocol stacks; achieved 100% client-spec compliance on functionality and performance benchmarks. Executed VTS / CTS / GTS test campaigns and ensured full standards of conformance prior to release. Analyzed Android HAL and modem logs to diagnose functional and performance anomalies at the radio/baseband boundary. Performed board bring-up activities and introduced new platform features per customer specifications, hitting on-time HW–SW integration milestones.

Education

Executive MBA, Dayananda Sagar University

B.Tech, Electronics and Telecommunication Engineering, Kalinga Institute of Industrial Technology, Bhubaneswar