Site Reliability Engineer at Google

London Area, United Kingdom

London Area, United Kingdom

London, United Kingdom

London, United Kingdom

Cambridge, United Kingdom

Manchester, United Kingdom

Edinburgh, United Kingdom
What I'm currently working on
Vibecoded projects



PhD, Informatics (Computer Architecture)
The University of Edinburgh

MSc, High Performance Computing
The University of Edinburgh
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Staff Site Reliability Engineer at Google, Apr 2023 - Present · 3 yrs 5 mos, London Area, United Kingdom, Network reliability and efficiency. Tech lead for SRE team that runs DNS for Google and GCP, and ingress and egress load balancing.
Senior Site Reliability Engineer at Google, Oct 2020 - Apr 2023 · 2 yrs 7 mos, London Area, United Kingdom
Site Reliability Engineer at Google, Oct 2017 - Oct 2020 · 3 yrs 1 mo, London, United Kingdom
Performance Engineer at KCG Holdings, Inc., Feb 2016 - May 2017 · 1 yr 4 mos, London, United Kingdom, Took a broad view of performance across trading systems and driving improvements. Part of a small person team driving a performance agenda across the firm. Involved regular collaboration with infrastructure, operations, software and FPGA development as well as trading teams. Hands-on work on measurement tools and infrastructure, monitoring, connectivity and optimisation of performance critical code. Benchmarking of vendor equipment including servers, network adapters, time synchronisation solutions etc.
Staff Software Engineer at Solarflare Communications, May 2013 - Feb 2016 · 2 yrs 10 mos, Cambridge, United Kingdom, Member of CTO’s staff. Part of small team architecting next generation network controller, which is the core technology for the company. Also contributed to technology strategy more broadly. Architecture for a range of network capture products, remaining hands-on and regularly checking in code in the process. Included frequent interaction with customers and partners. Previously member of the development team for an FPGA acceleration platform. This included work at all levels of the stack, from hardware architecture through firmware and drivers to host application software. Developed large parts of the co-simulation infrastructure.
Research Associate at University of Manchester, Mar 2010 - May 2013 · 3 yrs 3 mos, Manchester, United Kingdom, Looked into ways of harnessing large scale parallelism on future manycore devices, using dataflow principles. Research included scalable Transactional Memory, scalable memory coherence and consistency models and their implementation, and appropriate programming models.
Research Assistant at University of Edinburgh, 2008 - 2010 · 2 yrs, Edinburgh, United Kingdom, Explored the potential for Thread Level Speculation on a wide range of applications and using machine learning techniques to improve the performance of speculative execution.
PhD, Informatics (Computer Architecture), The University of Edinburgh
MSc, High Performance Computing, The University of Edinburgh
What I'm currently working on: Vibecoded projects
github: https://github.com/agarwalpratyaksh