---
title: "Golla Sai Teja Viswanath - Advanced VLSI Design & Verification Trainee in Bengaluru | Tal"
description: "Meet Golla Sai Teja Viswanath, RTL Design Engineer | Verilog HDL | Digital Design | VLSI Design & Verification | APB Interfaced SPI Master IP Core | B.Tech (Hons.) EEE, 2025 based in Bengaluru. AI stack includes claude code, gemini, and notebooklm. Explore public work links including saiteja-viswan..."
image: "https://tal.club/meet/sai-teja-viswanath-golla/share-image"
---

# Golla Sai Teja Viswanath on Tal

## Headline

RTL Design Engineer \| Verilog HDL \| Digital Design \| VLSI Design &amp; Verification \| APB Interfaced SPI Master IP Core \| B\.Tech \(Hons\.\) EEE, 2025

## About

Passionate about designing the digital systems behind tomorrow's technology\. Building expertise in Verilog RTL Design and VLSI Design &amp; Verification at Maven Silicon, backed by industry experience in hardware testing and debugging\. 🎯 Seeking opportunities in RTL Design and Design Verification \| Immediate Joiner

## Location

Bengaluru

## AI stack

claude code

gemini

notebooklm

openai

perplexity

## Work experience

Advanced VLSI Design &amp; Verification Trainee at Maven Silicon, Apr 2026 \- Present · 6 mos, Bengaluru, Karnataka, India

Customer Support Group at SCOPE T&amp;M, May 2025 \- Apr 2026 · 1 yr, PUNE, Electrical Wiring, Understanding Electrical Scheme Books, Signal Flow of Kits, Electronics Specifications of ICs, Handling of Circuit Breakers and Transducers, Field Testing in Switchyards, Testing of Various Types of Breakers, Lightning Arresters, and Transformers, Preparing MOMs \(Minutes of Meetings\), Interactions between NTPCs, Power Grids, Transcos, and Substations, and Skills Development through Learning New Software and Enhancing Technical Knowledge in Electronics\.

ELECTRICAL TESTING ENGINEER– R&amp;D CENTER at A\-THON, Dec 2024 \- Apr 2025 · 5 mos, Bangarapet, Karnataka, India, Actively contributed to the development of critical technical documents, including service manuals, process checks, and process control documentation, and conducted testing of vehicle harnesses, engines, and sensor components\. while gaining experience in startup culture with a focus on collaboration and adaptability in R\\&amp;D Center\.

3D Lidar\-BasedVehicleLocalization Prediction System at Boson Motors India, Feb 2024 \- Jun 2024 · 5 mos, Bhimavaram, Andhra Pradesh, India, In ROS \(Robot Operating System\), a topic is a named bus over which nodes can exchange messages\. It is a fundamental communication mechanism that allows nodes to publish and subscribe to specific data streams\. A topic acts as a channel for information flow within a ROS system\. Nodes can publish messages to a topic, making the data available to other nodes that are subscribed to the same topic\. This decoupled communication paradigm enables modular and distributed development of robotic systems\. URDF \(Unified Robot Description Format\) is a widely used XML\-based format in the field of robotics for describing the physical and visual properties of a robot\. While URDF is not directly related to transformations, it does play a role in defining the relationship between different components of a robot\.

Autocad Designer at ASCENT CS GLOBAL, Jul 2023 \- Sep 2023 · 3 mos, Bhimavaram, Andhra Pradesh, India

## Education

Bachelor of Technology \- BTech, B\.Tech \(Honors\) in Electrical and Electronics Engineering, SRKR Engineering College

Andhra Polytechnic College Kakinada, Electrical and Electronics Engineering, State Board of Technical Education and Training \(SBTET\), Andhra Pradesh

## Public links

- saiteja\-viswanath2003\.netlify\.app: https://saiteja\-viswanath2003\.netlify\.app/

[View the original profile](https://tal.club/meet/sai-teja-viswanath-golla)

```json
{
  "@context": "https://schema.org",
  "@graph": [
    {
      "@type": "Person",
      "@id": "https://tal.club/meet/sai-teja-viswanath-golla#person",
      "name": "Golla Sai Teja Viswanath",
      "url": "https://tal.club/meet/sai-teja-viswanath-golla",
      "image": "https://tal.club/meet/sai-teja-viswanath-golla/profile-photo.jpg",
      "description": "Meet Golla Sai Teja Viswanath, RTL Design Engineer | Verilog HDL | Digital Design | VLSI Design & Verification | APB Interfaced SPI Master IP Core | B.Tech (Hons.) EEE, 2025 based in Bengaluru. AI stack includes claude code, gemini, and notebooklm. Explore public work links including saiteja-viswan...",
      "jobTitle": "Advanced VLSI Design & Verification Trainee",
      "worksFor": {
        "@type": "Organization",
        "name": "Maven Silicon"
      },
      "hasOccupation": {
        "@type": "Occupation",
        "name": "Advanced VLSI Design & Verification Trainee"
      },
      "homeLocation": {
        "@type": "Place",
        "name": "Bengaluru"
      },
      "alumniOf": [
        {
          "@type": "EducationalOrganization",
          "name": "SRKR Engineering College"
        },
        {
          "@type": "EducationalOrganization",
          "name": "State Board of Technical Education and Training (SBTET), Andhra Pradesh"
        }
      ],
      "knowsAbout": [
        "claude code",
        "gemini",
        "notebooklm",
        "openai",
        "perplexity"
      ],
      "sameAs": [
        "https://saiteja-viswanath2003.netlify.app/"
      ],
      "mainEntityOfPage": {
        "@id": "https://tal.club/meet/sai-teja-viswanath-golla#webpage"
      }
    },
    {
      "@type": "ProfilePage",
      "@id": "https://tal.club/meet/sai-teja-viswanath-golla#webpage",
      "url": "https://tal.club/meet/sai-teja-viswanath-golla",
      "name": "Golla Sai Teja Viswanath on Tal",
      "description": "Meet Golla Sai Teja Viswanath, RTL Design Engineer | Verilog HDL | Digital Design | VLSI Design & Verification | APB Interfaced SPI Master IP Core | B.Tech (Hons.) EEE, 2025 based in Bengaluru. AI stack includes claude code, gemini, and notebooklm. Explore public work links including saiteja-viswan...",
      "dateModified": "2026-09-20T10:42:29.573Z",
      "isPartOf": {
        "@id": "https://tal.club/#website"
      },
      "mainEntity": {
        "@id": "https://tal.club/meet/sai-teja-viswanath-golla#person"
      },
      "primaryImageOfPage": {
        "@type": "ImageObject",
        "url": "https://tal.club/meet/sai-teja-viswanath-golla/profile-photo.jpg",
        "contentUrl": "https://tal.club/meet/sai-teja-viswanath-golla/profile-photo.jpg",
        "caption": "Golla Sai Teja Viswanath profile photo on Tal"
      },
      "inLanguage": "en-IN"
    }
  ]
}
```
