Sram design

Bengaluru, Karnataka, India

Hyderabad




Bachelor of Engineering, Electrical, Electronics and Communications Engineering
Dayananda Sagar College of Engineering, BANGALORE
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Bengaluru
Associate Design Engineer at Insemi Technology Services Pvt. Ltd., Apr 2026 - Present · 2 mos, Bengaluru, Karnataka, India
Associate Design Engineer at Insemi Technology Services Pvt. Ltd., Jul 2024 - Mar 2026 · 1 yr 9 mos, Hyderabad, client -AMD FPGA interconnect design
Junior Engineer at Insemi Technology Services Pvt. Ltd., Feb 2024 - Jul 2024 · 6 mos, understanding of 6T SRAM and 8T SRAM Bit Cell, Read & Write Operation •Familiar with memory architecture, PPA analysis, effects of RC, banking techniques and margin analysis •Knowledge of assist circuits used for reading & writing in memory implementation ofmemory features like Bypass, write mask, Cycle time & Access time •Experience in implementing SCAN chain for BIST Schematic & Layout Designing of Logical Gates, Standard Cells and SRAM Compiler •Knowledge on Sense Amplifier, Pre-decoder, Post-decoder, Local & Global Control Design
Patent Analyst at SagaciousElevate, Jul 2023 - Sep 2023 · 3 mos, •Conducted technical analysis of semiconductor and memory device patents to evaluate innovation trends, circuit architectures, and design methodologies. •Performed patent infringement analysis by comparing claim elements to assess potential overlap.
Intern at Digitectura Technologies, May 2022 - Oct 2022 · 6 mos, •Developed an image processing system using Raspberry Pi 3 for remote image acquisition and transmission. •Implemented real-time object detection using a camera module; performed image annotation and dataset preprocessing for supervised model training.
Bachelor of Engineering, Electrical, Electronics and Communications Engineering, Dayananda Sagar College of Engineering, BANGALORE