Headline

Qualcomm | IIT (BHU) Varanasi | Comp Arch, ML, Agents

About

Currently contributing as a Camera Hardware and Design Verification Engineer at Qualcomm, with a focus on microarchitecture and functional verification. Academic background includes pursuing a dual B.Tech + M.Tech in Electrical and Electronics Engineering at IIT (BHU), Varanasi, with thesis work on DC voltage-controlled inverters. Experienced in research and internships at global institutions, including the University of Maryland and Inria. Active member of RISC-V International since 2021, demonstrating a strong interest in computer architecture, hardware-software co-design, and domain-specific architecture. Skilled in microarchitecture, logic synthesis, and functional verification.

Location

India

AI stack

antigravity

codex

Work experience

Camera Team at Qualcomm, Jul 2024 - Present · 2 yrs 2 mos, Bengaluru, Camera IP Cores DV Engineer

Community Member at RISC-V International, May 2021 - Present · 5 yrs 4 mos

Intern @ Computer Architecture & Systems Lab at University of Maryland, Aug 2023 - Jan 2024 · 6 mos, College Park, Maryland, United States

Research Intern @ TARAN at Inria, Jun 2023 - Aug 2023 · 3 mos, Rennes, Brittany, France, TARAN: Domain-Specific Computers in the Post-Moore’s Law Era

Undergraduate Researcher at Indian Institute of Technology (Banaras Hindu University), Varanasi, Mar 2022 - Aug 2024 · 2 yrs 6 mos, Varanasi, Uttar Pradesh, India, - Working in VLPERI group (Power Electronics), under the supervision of Prof V N Lal. Thesis on DC Voltage controlled inverter with electrolytic capacitor-less topology

Founding Institute Captain, Cycling Club at Indian Institute of Technology (Banaras Hindu University), Varanasi, Nov 2021 - Oct 2022 · 1 yr, Varanasi, Uttar Pradesh, India

Education

B.Tech + M.Tech, Electrical and Electronics Engineering, Indian Institute of Technology (Banaras Hindu University), Varanasi

XII, CBSE, Computer Science, Maharishi Vidya Mandir Senior Secondary School