Headline

physical design

About

Currently pursuing an Engineer's degree in Electronics and Communication Engineering at SDM Institute of Technology under Visvesvaraya Technological University, with an expected graduation in April 2026. Currently engaged as a Physical Design Intern at ChipXpert, contributing to the comprehensive ASIC physical design flow from RTL to GDSII. Core competencies include CMOS fundamentals, timing closure, static timing analysis (STA), and expertise in using Cadence Innovus, Genus, and Tempus tools. At ChipXpert, collaborated on debugging post-CTS timing violations, leveraging optimization techniques to improve WNS and TNS for timing closure. Gained hands-on experience in parasitic extraction, power planning, and post-layout analysis, including congestion and DRC/antenna checks. Passionate about applying theoretical knowledge to practical challenges and contributing to innovative solutions in the semiconductor industry through collaborative teamwork.

Location

Shivamogga

AI stack

claude code

Work experience

Physical Design Internship at ChipXpert, Feb 2026 - Present · 8 mos, Banglore, •Trained on the complete ASIC physical design flow from RTL to GDSII, covering floorplanning, placement, clock tree synthesis (CTS), routing, and static timing analysis (STA). • Debugged and fixed post-CTS setup/hold timing violations, analyzing WNS, TNS, and slack to drive timing closure, and applied related optimization techniques. • Gained hands-on exposure to industry-standard EDA tools: Cadence Innovus, Cadence Genus, and Cadence Tempus. •Strengthened knowledge of CMOS fundamentals, standard cells, and PD concepts (floorplanning, power planning/PDN, MMMC/PVT corners, SDC constraints) relevant to semiconductor industry roles. •Practiced parasitic extraction and post-layout analysis, including congestion and DRC/antenna checks, to evaluate design performance. •Developed working confidence in a Linux/Unix environment, running PD flows and Tcl-based tool scripts.

Education

Engineer's degree, Electronics and communication engineering, SDM INSTITUTE OF TECHNOLOGY (SDMIT), UJIRE

Bachelor of Engineering, Electrical, Electronics and Communications Engineering, Visvesvaraya Technological University