Raju Agrawal on Tal
Headline
Principal Hardware Designer | 25G Ethernet | DDR4| PCIe Gen4 | SI/PI | 28L High-Speed PCB | Optical & FPGA Systems | XGS-PON | Data Center Platforms | Data Loggers Platforms
About
🔹 Senior Hardware Design Leader | High-Speed Board Design | FPGA/SoC | Signal & Power Integrity | Innovation (Multiple Patents Filed) I bring 20+ years of end-to-end hardware board design experience, including 15 years of technical leadership, across global MNCs. My career has been dedicated to designing and delivering complex high-speed digital, mixed-signal, and low-power systems — from concept and architecture to schematic, layout, prototyping, manufacturing, and final product shipment. I specialize in: High-Speed Board Design with DDR3/DDR4, PCIe, Ethernet, USB, HDMI, MIPI FPGA/SoC-based Systems, Mixed Signal & Low Power designs Signal & Power Integrity, Board Bring-up, DFM, FMEA, Risk Mitigation PCB Tools & Validation: Altium Designer, Cadence Allegro/OrCAD, Tina, Oscilloscopes, Logic Analyzers Leadership: Mentoring global teams (up to 8 engineers), cross-functional collaboration, global vendor coordination 🌟 Key Achievements Filed 6 innovation patents at Ciena (under PRB review). Delivered 10+ high-speed boards with zero design re-spin, saving major cost & time. Reduced board cost by 20% through optimized design. Led international projects, including a technical assignment in Houston, USA. I am passionate about building reliable, high-performance hardware systems and mentoring teams to excel in complex designs. Currently open to Senior / Principal roles globally — such as Principal Hardware Engineer, Hardware Architect, or Senior Manager – High-Speed Board Design — where I can contribute my expertise in innovation, leadership, and high-speed board design to shape next-gen products.
Work experience
Lead Engineer - Electronic Hardware 1 at Baker Hughes, Sep 2018 - Present · 8 yrs, Pune, Maharashtra, India, - Leading and mentoring a team of 4 people - Architect, design, review and ensuring product delivery on-time - Product management and people management
Manager-Hardware Design at ideaForge Technology Pvt. Ltd., Sep 2015 - Sep 2018 · 3 yrs 1 mo, Mumbai
Hardware Manager at Strix Systems, Dec 2011 - Sep 2015 · 3 yrs 10 mos, Mumbai Metropolitan Region
Lead Engineer -R&D at Tejas Networks, Jul 2010 - Dec 2011 · 1 yr 6 mos
Sr Design Engineer - R&D at Tejas Networks, Mar 2007 - Jul 2010 · 3 yrs 5 mos
Sr. R&D Engineer at Eisodus Networks (IIT Mumbai Incubator), Jan 2005 - Mar 2007 · 2 yrs 3 mos
Education
B.E., Electronics & Communication Engg, National Institute of Technology Durgapur
Post Graduation Diploma, VLSI Design, Advanced Digital Designs, HDLs, Synthesis, STA, System Archicture, FPGA, Centre for Development of Advanced Computing (C-DAC)
