ASIC Implementation Design Engineer @ Broadcom | Signoff @Synthesis,@PNR @DFT, @STA and ASIC Power modeling, Chip Design, Digital Electronics, Embedded Systems. | QC hardware Enthusiastic.












Master’s Degree, (dual major) (Electronics & Telecommunications)
University of Wollongong

Bachelor’s Degree, Electrical, Electronics and Communications Engineering
Jawaharlal Nehru Technological University
Join Pruthvi and 10k+ other professionals on
Tal is the app where bosses meet engineers & builders directly, without middlemen
Download Tal BossASIC Implementation Design Engineer @ Broadcom | Signoff @Synthesis,@PNR @DFT, @STA and ASIC Power modeling, Chip Design, Digital Electronics, Embedded Systems. | QC hardware Enthusiastic.
As a ASIC Design Engineer at Broadcom, I apply my skills and knowledge in VLSI Signoff stage including, Synthesis, DFT, STA . I have worked on microcontrollers, digital electronics, and circuit design to create innovative and high-performance ASIC solutions for the electronics and telecommunications industry. I work with a cross-functional team of engineers, designers, and testers to deliver quality products that meet the customer's needs and specifications. I also contribute to the R&D activities of the company, exploring new technologies and methodologies to improve the efficiency and functionality of the ASIC design process. I have over 8 years of experience as a Design Engineer and 2.5 years in Telecommunications Engineer, working for various companies in the electronics and telecommunications industry. I have been involved in various projects, such as designing and developing electronics and bio-medical products, performing RTL design using HDL, and conducting physical design engineering for VLSI systems. I have also obtained a master's degree in Electronics and Telecommunications from the University of Wollongong. and two certifications in VLSI design engineering. I am passionate about learning new skills and staying updated with the latest trends and developments in my field. My goal is to use my expertise and creativity to design and develop cutting-edge ASIC solutions that can enhance the performance and reliability of the telecommunications network.
Bengaluru
claude
gemini
grok
notebooklm
ChatGPT
Microsoft Copilot
ASIC Implementation signoff Engineer at Broadcom, Jan 2025 - Present · 1 yr 10 mos
ASIC Implementation Engineer at LeadSoc Technologies Pvt Ltd, Jul 2024 - Present · 2 yrs 4 mos
Design Engineer at NXP Semiconductors, Jul 2024 - Dec 2024 · 6 mos
Design Engineer at Ericsson, Nov 2021 - Jul 2024 · 2 yrs 9 mos
Design Engineer at Eximius Design, Jan 2021 - Jul 2024 · 3 yrs 7 mos
Master’s Degree, (dual major) (Electronics & Telecommunications), University of Wollongong
Bachelor’s Degree, Electrical, Electronics and Communications Engineering, Jawaharlal Nehru Technological University