Prakyat Prabhakar Shetty profile photo 1 on Tal

Prakyat Prabhakar Shetty

Hardware Engineer @ Dell | Failure Analysis & Platform Debug | AI Server Platforms (HGX/Blackwell) · Power & Protocol FA | Ex-Bloom Energy

Bengaluru

6+ years of work experience

Dell Technologies
Jul 20242 yrs 2 mosPresent

Bengaluru, Karnataka, India

Closed 140+ JIT failure analysis cases (35+ complex, multi-domain) across PowerEdge server platform families (15G–18G), owning root-cause investigation end-to-end from intake to design-correction signoff. Performed system-level hardware debugging on NVIDIA HGX and NVL platforms (Hopper and Blackwell generations), including Direct Liquid Cooling lab infrastructure diagnosing failures across CPU, memory, power, and I/O subsystems on high-density AI servers. Conducted PCIe, I2C, I3C, SPI, and 1-Wire signal trace collection and analysis to isolate bus-level faults; root-caused an I2C bus-contention failure (OSFP heatsink-clamp defect) that was breaking hardware root-of-trust at boot. Drove root cause analysis on firmware-induced failures including a PLDM update failure traced to MCTP management traffic colliding during the download phase and converted findings into design and firmware corrections with BIOS, BMC, and platform teams. Diagnosed power rail shorts and hardware-damage cases at the board level, applying a power-electronics lens (DC-DC R&D background) to isolate fault origin rather than just symptom. Performed signal integrity analysis on high-speed buses (PCIe, DDR) to isolate physical-layer faults during failure investigation. Contributed Design-for-Test / Manufacturing (DFx) feedback from recurring failure patterns, helping prevent defect escapes into the field. Built AI agents to debug protocol logs and to streamline triage and surface failure trends across cases, reducing repeat investigation time.
Dell Technologies
Jul 20231 yr 1 moJul 2024

Bengaluru, Karnataka, India

Bloom Energy
Sep 20211 yr 1 moSep 2022

Bengaluru, Karnataka, India

​Collaborated on product development and continuous improvement for the PCS DC-DC platform, driving component enablement and hardware validation. ​Spearheaded component second-sourcing initiatives, analyzing datasheets and qualifying cost-effective alternate parts without compromising system integrity. ​Performed rigorous circuit debugging for noise immunity and executed comprehensive reliability and validation testing to ensure strict specification compliance.
SI Global PVT. Ltd.
Aug 20192 yrs 2 mosSep 2021

Kudlu Gate

Intech Additive Solutions
May 20153 mosJul 2015

Bengaluru, Karnataka, India

Prakyat’s AI Stack

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opencode
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claudecode
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Education

Manipal School of Information Sciences

Master of Engineering - MEng, Embedded Systems

Manipal School of Information Sciences

20222 yrs2024
Mangalore Institute of Technology and Engineering, Mangalore, India

Bachelor of Engineering - BE, Mechatronics

Mangalore Institute of Technology and Engineering, Mangalore, India

20163 yrs2019

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Headline

Hardware Engineer @ Dell | Failure Analysis & Platform Debug | AI Server Platforms (HGX/Blackwell) · Power & Protocol FA | Ex-Bloom Energy

About

Hardware Engineer with 5+ years of system-level debug and root-cause investigation on enterprise and AI server platforms. At Dell Technologies, I've closed 140+ JIT cases including 35+ complex, multi-domain investigations across PowerEdge platform families (15G–18G). My work spans CPU, memory, PCIe, power subsystem, BMC/BIOS firmware, and I/O failure analysis, with hands-on protocol trace collection across PCIe, I2C, I3C, SPI, and 1-Wire interfaces. I've worked extensively on NVIDIA HGX and NVL platforms (Hopper and Blackwell generations), including Direct Liquid Cooling infrastructure system-level exposure to high-density AI server architecture that most debug engineers don't get near. I don't stop at case closure. I trace failures back to their design origin power rail shorts, signal integrity faults, defective layout decisions and turn those findings into design corrections, working alongside hardware design, BIOS, BMC, and validation teams. My DC-DC converter R&D background at Bloom Energy and an in-house PCIe analyzer build give me a designer's lens on why hardware fails, not just that it failed. I also build AI agents that debug protocols logs and failure-trend pipelines to cut mean-time-to-resolution and surface systemic defects before they reach the field. MindShare PCIe Architecture Certified | M.E Embedded Systems

Location

Bengaluru

AI stack

cursor

opencode

claudecode

Work experience

Hardware Engineer 2 at Dell Technologies, Jul 2024 - Present · 2 yrs 2 mos, Bengaluru, Karnataka, India, Closed 140+ JIT failure analysis cases (35+ complex, multi-domain) across PowerEdge server platform families (15G–18G), owning root-cause investigation end-to-end from intake to design-correction signoff. Performed system-level hardware debugging on NVIDIA HGX and NVL platforms (Hopper and Blackwell generations), including Direct Liquid Cooling lab infrastructure diagnosing failures across CPU, memory, power, and I/O subsystems on high-density AI servers. Conducted PCIe, I2C, I3C, SPI, and 1-Wire signal trace collection and analysis to isolate bus-level faults; root-caused an I2C bus-contention failure (OSFP heatsink-clamp defect) that was breaking hardware root-of-trust at boot. Drove root cause analysis on firmware-induced failures including a PLDM update failure traced to MCTP management traffic colliding during the download phase and converted findings into design and firmware corrections with BIOS, BMC, and platform teams. Diagnosed power rail shorts and hardware-damage cases at the board level, applying a power-electronics lens (DC-DC R&D background) to isolate fault origin rather than just symptom. Performed signal integrity analysis on high-speed buses (PCIe, DDR) to isolate physical-layer faults during failure investigation. Contributed Design-for-Test / Manufacturing (DFx) feedback from recurring failure patterns, helping prevent defect escapes into the field. Built AI agents to debug protocol logs and to streamline triage and surface failure trends across cases, reducing repeat investigation time.

Graduate Intern at Dell Technologies, Jul 2023 - Jul 2024 · 1 yr 1 mo, Bengaluru, Karnataka, India

Electrical Engineer at Bloom Energy, Sep 2021 - Sep 2022 · 1 yr 1 mo, Bengaluru, Karnataka, India, ​Collaborated on product development and continuous improvement for the PCS DC-DC platform, driving component enablement and hardware validation. ​Spearheaded component second-sourcing initiatives, analyzing datasheets and qualifying cost-effective alternate parts without compromising system integrity. ​Performed rigorous circuit debugging for noise immunity and executed comprehensive reliability and validation testing to ensure strict specification compliance.

Project Engineer (Process automation) at SI Global PVT. Ltd., Aug 2019 - Sep 2021 · 2 yrs 2 mos, Kudlu Gate

Summer Intern at Intech Additive Solutions, May 2015 - Jul 2015 · 3 mos, Bengaluru, Karnataka, India

Education

Master of Engineering - MEng, Embedded Systems, Manipal School of Information Sciences

Bachelor of Engineering - BE, Mechatronics, Mangalore Institute of Technology and Engineering, Mangalore, India