Headline

CPU Power & Performance | AI Accelerator Validation | Python Automation & Test Developer | Compilers Quality Engineer

About

Engineering professional with 6+ years of experience in the data-center CPU performance validation/debug, python programming, and Linux shell programming. Looking for an opportunity to enhance technical skills in cutting-edge technologies research and development.

Location

Bengaluru

AI stack

claude code

claude

codex

gemini

openclaw

opencode

Work experience

Software Engineer at Qualcomm, Dec 2025 - Present · 10 mos, Bengaluru, Karnataka, India

Software Engineer at Ventana Micro Systems, Oct 2024 - Jan 2026 · 1 yr 4 mos, Bengaluru, Karnataka, India

Compiler Quality Engineer at AMD, Jul 2022 - Oct 2024 · 2 yrs 4 mos, Bengaluru, Karnataka, India, • Compiler Functional Testing: Primarily responsible for the functional coverage testing of the AMD AOCC Compiler. • Workload Specialization: Focused on testing using high-performance workloads, including SPEC benchmarks, HPC Applications, and other critical open-source applications. • Automation and Utilities: Developed Python automation test scripts and utility programs for efficient result generation and updating, streamlining the testing workflow. • Quality Assurance: Conducted essential day-to-day activities including bug triage and debugging to ensure compiler stability and performance. • DevOps & Workflow Tools: Utilized key tools such as JIRA, Jenkins, Confluence, and Git for daily task management, CI/CD pipeline integration, documentation, and version control.

Python Automation Test Developer at VVDN Technologies, Sep 2021 - Jul 2022 · 11 mos, India, • Automation Specialist: Developed and executed robust Python and Robot Framework scripts for the automated testing of complex Embedded Systems (like cameras and switch-boxes). • Framework Contribution: Wrote over 100 custom keywords for the Robot Framework, significantly extending test coverage and improving script efficiency. • Full-Cycle QA: Managed quality assurance across all stages of the Software Development Life Cycle (SDLC) and QA Life Cycle (QALC). • Scripting & Data: Utilized UNIX/LINUX-Bash and Shell scripting for environment tasks, and wrote Python scripts for database updates and file manipulation. • Collaboration Tools: Streamlined issue tracking, reporting, and auditing using JIRA, and managed code integrity with GIT/GitHub. • Core Toolkit: PyCharm, Selenium, Robot Framework, JIRA, GitHub, openCV, and GStreamer-python

Data Center CPU Performance Validation/Debug Engineer at Intel Corporation, Jul 2019 - Sep 2021 · 2 yrs 3 mos, India, Experience in testing and debugging AI Accelerator card based on Neural Network Processor to perform inferences Validating software based on Interoperability and stability workloads, CNN models like Resnet, Shufflenet, VGG-19 Platform level debugs of SLED servers that support HW Accelerator, openBMC, OOB, BIOS/Firmware, and FPGA. Python programming for workloads based on OpenCV, Pandas, DMA, HW-Screener, Glow, and LLVM compiler. Understanding of CPU architectures and beginner-level knowledge of PMC, MCU, Punit and debug tools like JTAG, ITP, and ASD. Tools & Frameworks: Glow, Pytorch, GitHub, NIC, F-ANN, R-CNN, NumPy, ONNX, HW Optimizations, Blobs & Artifacts.

Data center CPU Power and Performance Engineer at Intel Corporation, Mar 2018 - Aug 2019 · 1 yr 6 mos, India, Datacenter CPU’s power deals with TDP[Thermal Design Power], Worked on tools which measure CPU power by using throughput of TDP values. Debug Experience of Power measurement includes P-code register (interrupts) value changes and code-level changes in BIOS/Firmware with the help of ITP and JTAG debug tools. Being part of debugging team to analyze benchmark performances for each software release and having an opportunity to publish the power and performance report weekly. Experience in performance measurement of the Processor with the help of SPEC’s(Standard Performance Evolution Corp.) various benchmarks such as perlbench(Perl interpreter), AI tree search benchmarks like deepsjeng, Leela,exchange2,xz, etc. Server performance measuring with high scale memory and source codes of SPEC workloads int speed, fpspeed, intrate, and fprate, to measure integer and floating-point operations of CPU. Debugging of the software and the hardware, which lowers the performance of the system. Other performance benchmarks include Linpack, stream server, and memory latency check. Tools & Frameworks: Yokogawa power meter, AC-DC power analyzer, SERT(Server Efficiency Rating Tool), SPEC-Ptdaemon, ITP, and JTAG.

Education

Bachelor's degree, Electronics and Communications Engineering, Vishwakarma Government Engineering College