Headline

SWE @Qualcomm | DTU(DCE)’24 ECE

About

I build the software that makes hardware work. My expertise lies in device drivers, firmware, and silicon bring-up for Mobile, XR, Compute, and IoT platforms. I handle the full development lifecycle, from validating early designs on emulation platforms to optimizing boot sequences for the final product. I specialize in deep-dive debugging and root-cause analysis, using tools like TRACE32 to solve complex system instability issues. I enjoy working at the hardware-software interface and delivering code that is stable, efficient, and reliable. Always happy to connect and geek out over embedded systems, C++ nuances, or the latest trends in silicon & tech in general.

Location

New Delhi

AI stack

antigravity

codex

Work experience

Engineer at Qualcomm, Nov 2025 - Present · 10 mos, On-site, - Continuing to engineer robust PCIe and MHI driver solutions for Qualcomm’s flagship platforms with increased ownership of the feature lifecycle. - Focusing on architectural improvements, pre-silicon validation strategies, and system stability for unreleased hardware.

Associate Engineer at Qualcomm, Jul 2024 - Dec 2025 · 1 yr 6 mos, Hyderabad, Telangana, India, - Spearheaded PCIe & MHI driver development across various NHLOS & HLOS subsystems, implementing support for multiple endpoints, complex switch topologies, and aggressive low-power mode requirements. - Designed and optimized NHLOS bootloader stages (PBL, XBL, UEFI) to manage high-efficiency data transfer and link training, ensuring seamless enumeration of peripheral devices across Mobile, XR, and Compute verticals. - Led Pre-Silicon and Silicon Bring-up efforts, validating IP functionality on emulation platforms and proactively identifying hardware-software interface issues to ensure a defect-free tape-out. - Owned the full feature lifecycle from scoping to Customer Release, delivering robust driver solutions for flagship SoCs while adapting to dynamic hardware changes and strict deadlines. - Resolved complex system instability and link training failures using TRACE32 JTAG, performing deep-dive root cause analysis on register interactions and bus transactions. - Collaborated with hardware designers and validation teams to integrate PCIe features, ensuring alignment on specs and delivering firmware workarounds for silicon errata.

Interim Engineering Intern at Qualcomm, Jan 2024 - Jun 2024 · 6 mos, On-site, - Built a full-stack automated diagnostic tool using .NET, C#, and Python to interpret complex system telemetry and hardware states. - Designed the complete solution end-to-end, from efficient backend parsing to an intuitive frontend UI, streamlining workflows for various cross-functional teams. - Reduced manual debugging time by approximately 60% by automating the extraction and visualization of critical failure data.

Interim Engineering Intern at Qualcomm, Jun 2023 - Aug 2023 · 3 mos, Hyderabad, Telangana, India, - Built a full-stack Analytics Portal (React, Django, Node) to aggregate and display engineering health metrics across multiple verticals. - Implemented automated data processing services that parsed and visualized complex diagnostic artifacts, replacing legacy manual workflows. - Delivered a scalable solution that integrated with internal version control and bug-tracking databases, significantly increasing visibility into project velocity and stability.

USIP (University Student Internship Program) Intern at Delhi Technological University (Formerly DCE), Nov 2021 - Apr 2022 · 6 mos, Delhi, India, - Developed and delivered a Foundational Tech Curriculum to democratize access to computer science education for underprivileged groups. - Focused on skill-building and digital empowerment, ensuring students gained practical knowledge relevant to today's digital economy. - Facilitated technical workshops, effectively communicating complex ideas to diverse audiences with varying levels of technical literacy.

Co-Head at INNOVA DTU, Aug 2021 - Mar 2023 · 1 yr 8 mos, On-site, - Managed a team of 20+ members to drive technical content creation and campus-wide literacy initiatives. - Organized flagship technical fests with significant student footfall, overseeing end-to-end event operations from conceptualization to execution. - Authored and edited technical publications, bridging the gap between academic theory and practical application.

Member at INNOVA DTU, Dec 2020 - Aug 2021 · 9 mos, Delhi, India

Electronics Engineer at INFERNO DTU, Dec 2020 - Jul 2021 · 8 mos, Delhi, India, - Developed firmware drivers and communication protocols (UART, I2C, SPI) to interface sensors with the central processing unit, ensuring low-latency hardware control. - Implemented ROS (Robot Operating System) nodes to manage efficient message passing between the hardware abstraction layer and high-level navigation algorithms. - Secured 6th position globally (out of 30+ top technical universities) at the International Planetary Aerial Systems Challenge (IPAS) by engineering a highly reliable telemetry and science data collection suite.

Education

Bachelor of Technology - BTech, Electrical, Electronics and Communications Engineering, Delhi Technological University (Formerly DCE)