---
title: "Parna Lata Chaurasia - Summer Research Intern in Bhilai | Tal"
description: "Meet Parna Lata Chaurasia, Final Year Electrical Engineering Student at IIT Bhilai | Embedded & Digital Systems Developer | Control Systems | FPGA Architecture | Verilog & RTL Design based in Bhilai. AI stack includes antigravity, codex, and cursor."
image: "https://tal.club/meet/parna-lata-chaurasia/share-image"
---

# Parna Lata Chaurasia on Tal

## Headline

Final Year Electrical Engineering Student at IIT Bhilai \| Embedded & Digital Systems Developer \| Control Systems \| FPGA Architecture \| Verilog & RTL Design

## About

Currently pursuing a Bachelor of Technology at the Indian Institute of Technology, Bhilai, with an expected graduation in 2027\. Educational focus emphasizes electrical engineering, supported by competencies in Cadence Virtuoso, power electronics, and C programming\. Completed a Summer Research Internship at IISER Bhopal, gaining hands\-on exposure to practical applications in engineering\. Committed to developing expertise in embedded systems and digital technologies while contributing to innovative solutions in electronic system development\.

## Location

Bhilai

## AI stack

antigravity

codex

cursor

## Work experience

Summer Research Intern at IISER Bhopal, May 2025 \- Jul 2025 · 3 mos

Member at The Pixel Snappers, 2024 \- 2025 · 1 yr

Member at ELECTROMOS Sci\-Tech Club ,IIT Bhilai, 2024 \- 2025 · 1 yr

## Education

Bachelor of Technology, Indian Institute of Technology, Bhilai

12th, Good Shepherd Convent, Shahdol

[View the original profile](https://tal.club/meet/parna-lata-chaurasia)

```json
{
  "@context": "https://schema.org",
  "@graph": [
    {
      "@type": "Person",
      "@id": "https://tal.club/meet/parna-lata-chaurasia#person",
      "name": "Parna Lata Chaurasia",
      "url": "https://tal.club/meet/parna-lata-chaurasia",
      "image": "https://tal.club/meet/parna-lata-chaurasia/profile-photo.jpg",
      "description": "Meet Parna Lata Chaurasia, Final Year Electrical Engineering Student at IIT Bhilai | Embedded & Digital Systems Developer | Control Systems | FPGA Architecture | Verilog & RTL Design based in Bhilai. AI stack includes antigravity, codex, and cursor.",
      "jobTitle": "Summer Research Intern",
      "worksFor": {
        "@type": "Organization",
        "name": "IISER Bhopal"
      },
      "hasOccupation": {
        "@type": "Occupation",
        "name": "Summer Research Intern"
      },
      "homeLocation": {
        "@type": "Place",
        "name": "Bhilai"
      },
      "alumniOf": [
        {
          "@type": "EducationalOrganization",
          "name": "Indian Institute of Technology, Bhilai"
        },
        {
          "@type": "EducationalOrganization",
          "name": "Good Shepherd Convent, Shahdol"
        }
      ],
      "knowsAbout": [
        "antigravity",
        "codex",
        "cursor"
      ],
      "mainEntityOfPage": {
        "@id": "https://tal.club/meet/parna-lata-chaurasia#webpage"
      }
    },
    {
      "@type": "ProfilePage",
      "@id": "https://tal.club/meet/parna-lata-chaurasia#webpage",
      "url": "https://tal.club/meet/parna-lata-chaurasia",
      "name": "Parna Lata Chaurasia on Tal",
      "description": "Meet Parna Lata Chaurasia, Final Year Electrical Engineering Student at IIT Bhilai | Embedded & Digital Systems Developer | Control Systems | FPGA Architecture | Verilog & RTL Design based in Bhilai. AI stack includes antigravity, codex, and cursor.",
      "dateModified": "2026-08-01T20:39:43.609Z",
      "isPartOf": {
        "@id": "https://tal.club/#website"
      },
      "mainEntity": {
        "@id": "https://tal.club/meet/parna-lata-chaurasia#person"
      },
      "primaryImageOfPage": {
        "@type": "ImageObject",
        "url": "https://tal.club/meet/parna-lata-chaurasia/profile-photo.jpg",
        "contentUrl": "https://tal.club/meet/parna-lata-chaurasia/profile-photo.jpg",
        "caption": "Parna Lata Chaurasia profile photo on Tal"
      },
      "inLanguage": "en-IN"
    }
  ]
}
```