Senior GPU, Platform & AI Validation Engineer | 12+ yrs at Intel · NVIDIA · AMD | Display · Media · NPU on DG1 / DG2 / Lunar Lake / Panther Lake | Open to work

Bengaluru

Bengaluru, Karnataka, India

Bengaluru

Pune Area, India

Pune/Pimpri-Chinchwad Area

India

India

Greater Hyderabad Area

Pune/Pimpri-Chinchwad Area






Bachelor of Engineering (B.E.), Information Technology
East west institute of technology

Higher Secondary Examination, MPC
doon public school
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Download Tal BossSenior GPU, Platform & AI Validation Engineer | 12+ yrs at Intel · NVIDIA · AMD | Display · Media · NPU on DG1 / DG2 / Lunar Lake / Panther Lake | Open to work
I find the GPU bugs your customers will see — before they see them. 12+ years of hands-on post-silicon validation across Intel, NVIDIA, and AMD. Four GPU generations owned end-to-end at Intel: DG1 (Iris Xe MAX — Intel's first discrete GPU), DG2 / ARC Alchemist, Lunar Lake, and Panther Lake. Display, media, graphics, and now NPU / AI workload validation — on real silicon, under real customer load. WHAT I DO - Post-silicon GPU & platform validation on actual silicon — not simulation - Display protocol bring-up: HDMI 2.1, eDP, DisplayPort, HDCP - Media encode / decode validation; content-creation workflow QA (Adobe, DaVinci, Blender) - NPU / AI workload validation — INT8 / FP16 inference, OpenVINO, DirectML, GPU+NPU co-execution - Cross-stack debug: BSOD, TDR, GPU-hang root-cause across driver / firmware / OS / HW (WinDbg, GDHM, GPUView, Intel GPA, Lauterbach, ETW / ETL) - OEM escalation management — primary Intel contact for Microsoft Surface, Dell, HP, Samsung IMPACT - 27% faster time-to-resolution on high-severity in-market defects - 30% drop in customer-facing escalations via structured triage - +40% post-silicon test coverage expansion across 200+ suites - 100+ defects reported, 1,000+ triaged - 3× Intel Division Recognition Awards — DG1 launch · Workstation GPU planning · Pandemic remote-setup enablement - Technical owner in the Intel × Adobe ARC GPU partnership CURRENTLY Shipping applied-AI side projects while I hunt for the next right role: - InboxAI — hybrid local (RTX 3080 + Ollama) / cloud inference email client - AI-Powered Interview Assistant — offline LLM desktop helper - AlgoForge — AI-assisted DSA learning platform Open to: Senior GPU / Platform / Firmware Validation · AI-Platform Validation · Technical Account Manager roles. Bengaluru-based; open to hybrid and remote. 📩 nishantsonuster@gmail.com 📞 +91 7020134459
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Software Enabling & Optimization Engineer — Graphics & AI Platforms at Intel Corporation, Feb 2025 - Jul 2025 · 6 mos, Bengaluru, Customer-facing graphics & AI triage role focused on Intel ARC and integrated Xe across the field. Role concluded due to geo-based org consolidation. - Owned P0 / P1 defect triage for Intel ARC and integrated Xe customers. Built a repeatable replication + data-capture workflow that cut engineering-noise tickets 10% in Q1'25 and dropped customer-facing escalations 30%. - Chaired cross-team P0 / P1 resolution calls spanning driver, firmware, platform, and OEM partners — improved ticket closure rate 22% and kept time-critical fixes on release trains. - Applied AI-assisted log synthesis to accelerate BSOD-dump and multi-ingredient ETL analysis; findings fed back into Intel's AI-driven customer-response tooling. Keywords: Intel ARC, Xe graphics, customer escalations, P0/P1 triage, BSOD debug, ETL analysis, driver debug, AI-assisted triage.
System Validation Engineer at Intel Corporation, Apr 2019 - Jul 2025 · 6 yrs 4 mos, Bengaluru, Karnataka, India
Platform Validation Engineer — Graphics & AI Domain Owner at Intel Corporation, Apr 2019 - Jan 2025 · 5 yrs 10 mos, Bengaluru, Six-year run owning post-silicon validation across four Intel GPU generations. Primary Intel validation contact for Microsoft Surface, Dell, HP, Samsung. Technical owner in the Intel × Adobe ARC partnership. POST-SILICON OWNERSHIP — 4 GPU GENERATIONS - End-to-end ownership for DG1 (Iris Xe MAX, Intel's first discrete GPU), DG2 / ARC Alchemist, Lunar Lake (Xe2 + NPU), Panther Lake (Xe3 + next-gen NPU). - Authored System Integration plans and post-silicon debug content for each program. DISPLAY & MEDIA - Led HDMI 2.1, Display Shift, eDP, DisplayPort bring-up on DG2. - Validated 3D pipelines, media encode / decode, display IP across SKUs on real silicon. AI & NPU VALIDATION - Validated NPU execution on Lunar Lake and Panther Lake — inference latency, INT8 / FP16 accuracy, OpenVINO / DirectML dispatch, GPU+NPU co-execution. COVERAGE & QUALITY - Expanded coverage across 200+ suites → +40% overall, +20% on display / media. Retired 20% redundant coverage. - Cut post-release defects 18–30% via escape analysis. Reported 100+ defects; triaged 1,000+ in-market issues. DEBUG & ROOT-CAUSE - Cleared 10+ P0 / P1 blockers per release — BSOD, TDR, GPU-hang root-cause across driver / firmware / OS / HW using GDHM, GPUView, WinDbg, Intel GPA, Lauterbach, ETW / ETL. - Built early-warning dashboard for in-market signals — 27% faster time-to-resolution. OEM & PARTNER - Primary Intel contact for Microsoft Surface, Dell, HP, Samsung. - Technical owner in Intel × Adobe ARC partnership — led post-launch resolution for Adobe Creative Suite, DaVinci Resolve, Blender. RECOGNITION - 3× Intel Division Recognition Awards — DG1 launch · Workstation GPU Planning · Pandemic Remote Enablement. Keywords: DG1, DG2, ARC Alchemist, Lunar Lake, Panther Lake, Xe2, Xe3, NPU, post-silicon, HDMI 2.1, DisplayPort, HDCP, WDDM, DirectX 12, Vulkan, OpenVINO, DirectML, WinDbg, BSOD, TDR.
Software QA Engineer at NVIDIA, Jan 2017 - Mar 2019 · 2 yrs 3 mos, Pune Area, India, Led NVWMI driver validation and graphics API hardening across Windows, Ubuntu, and RHEL. Built HPC test coverage on IBM Power9 + NVIDIA Tesla. HDCP domain owner across HDMI / DisplayPort on Quadro. DRIVER VALIDATION - Owned NVWMI driver validation on Windows, Ubuntu, and RHEL across short-lived and long-lived branches. - Led a 5-member validation team across two release cycles. GRAPHICS API & DISPLAY - Hardened stability across DirectX, OpenGL, and Vulkan. - HDCP domain owner across HDMI / DisplayPort on Quadro — +10% coverage via dashboard. - Validated GeForce NOW, Nview, Vulkan-over-RDP, and VR headset enablement (Acer, Microsoft) for Autodesk workstation software. HPC ON POWER9 + TESLA - Built 40+ HPC test cases for VMD, ParaView, and VisIt on IBM Power9 + NVIDIA Tesla. - Researched app internals, defined performance baselines, and unblocked non-standard Power9 builds with upstream developers. Keywords: NVIDIA, Quadro, Tesla, NVWMI, HDCP, DirectX, OpenGL, Vulkan, HPC, IBM Power9, ppc64le, GeForce NOW, VR.
Test Engineer — NVIDIA GPU on IBM Power8 (Client: IBM) at ILabs Technology Solutions, Mar 2016 - Dec 2016 · 10 mos, Pune/Pimpri-Chinchwad Area, Contract engagement testing NVIDIA GPU drivers on IBM Power8 architecture for IBM. - Tested NVIDIA GPU drivers on IBM Power8 for Ubuntu and RHEL. - Built and validated open-source HPC apps for ppc64le architecture. - Compared GPU performance vs x86_64 using FSAA, Shader Cache, and app-profile features. - Collaborated with upstream developers to unblock non-standard Power8 builds. Keywords: NVIDIA, IBM Power8, ppc64le, Ubuntu, RHEL, HPC, GPU driver, performance benchmarking.
QA Engineer — AMD Catalyst Validation (Client: AMD) at TEKsystems, Sep 2015 - Mar 2016 · 7 mos, India, Contract at TEKsystems driving AMD Catalyst driver qualification for AMD. - Graphics API testing (OpenGL / DirectX / Mantle) across AMD Catalyst driver releases. - Performance and benchmarking on AMD graphics cards using AAA game titles. - Validated PowerXpress configurations across full AMD Catalyst functionality. - AMD CrossFire / Hybrid CrossFire / Dual Graphics configuration testing. - AMD Single Large Surface (SLS) validation across display combinations. - Stereo 3D game and application testing on AMD GPU driver. - Functional, regression, and sanity testing; defect reporting and tracking. Keywords: AMD, Radeon, Catalyst, OpenGL, DirectX, Mantle, CrossFire, PowerXpress, SLS, Stereo 3D.
AMD Catalyst · Virtual Super Resolution (VSR) · Frame Rate Target Control (FRTC) at TEKsystems, Jan 2015 - Mar 2016 · 1 yr 3 mos, India, Named AMD feature-validation projects delivered during AMD Catalyst release cycles. - AMD Catalyst — full software stack validation across Windows 7, Windows 8, Linux on AMD APUs and Radeon graphics for desktop and notebook. - Virtual Super Resolution (VSR) — validated game- and engine-agnostic SSAA simulation across titles without native SSAA support, including combinations with in-game anti-aliasing. - Frame Rate Target Control (FRTC) — validated frame-rate cap behaviour in full-screen mode: power consumption reduction, thermal impact, and fan-noise characteristics on discrete graphics cards.
Shader Cache & AMD Radeon Software Crimson Edition at TEKsystems, Nov 2014 - Mar 2016 · 1 yr 5 mos, Greater Hyderabad Area, Feature validation during AMD's Catalyst → Radeon Software Crimson transition. - Shader Cache — validated pre-compiled shader caching to eliminate runtime compilation delays. Tested cache generation across engine-wide global-setting variants and prioritized selective compilation paths for specific setting combinations. - AMD Radeon Software Crimson Edition — participated in validation of AMD's redesigned graphics software stack: new UI, graphics performance uplift, and feature regression across the Catalyst-to-Crimson migration.
Junior Tester at Ubisoft, Mar 2014 - Nov 2014 · 9 mos, Pune/Pimpri-Chinchwad Area, QA on Ubisoft AAA title The Crew and the Uplay platform across PC, PlayStation, and Xbox. - Functional and integration testing for The Crew and its companion app across PC and PlayStation 4. - Uplay game-portal QA across multiple console and PC environments. - Defect discovery across visual appeal, audio, functionality, performance, crashes, exploits, challenge, and overall entertainment. - Authored test passes in Excel and Ubisoft's proprietary test tooling. - Participated in play-tests; delivered qualitative feedback via group reviews and written reports. Keywords: Ubisoft, The Crew, Uplay, AAA games, QA, PS4, functional testing, integration testing.
Bachelor of Engineering (B.E.), Information Technology, East west institute of technology
Higher Secondary Examination, MPC, doon public school