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NILESH PATIL

Executive Engineer at Secure Meters Limited

Indore

9+ years of work experience

Secure Meters Limited
Jun 20215 yrs 5 mosPresent

Udaipur, Rajasthan, India

Authored protocols and reports; specific to the validation of test methods Experienced in working with suppliers for the development of inspection methods Responsible for initiating, implementing and completing change control, deviations, investigations, impact/risk assessments, root cause analysis, and CAPAs. Performed process capability studies with FTY & Cpk indexes to analyze processes. Perform commissioning and validation for a new manufacturing facility, supporting software and author qualification protocols. Designed experiments and authored protocols, summary documentation, change controls and regulatory documentation. Managed deviation and non-conformance reports and investigations. Scheduled project activities in concert with the production schedule while meeting all milestones. Performed a variety of general validation activities, including the IQ/OQ/PQ activities for equipment. Provide Engineering support to fix or improve performance of existing systems.
Aug 20182 yrs 2 mosSep 2020

· Design Verification Testing (DVT): Conducted rigorous schematic verification and board-level validation on pre-production prototypes. · PCB & Component Validation: Evaluated PCB layouts, generated wiring diagrams, and managed hardware testing timelines to guarantee robust electronic signals. · Failure Analysis: Worked closely with design engineers to evaluate field and lab failure modes, executing Engineering Change Requests (ECR) to update circuit layouts accordingly. · Cost & Quality Analysis: Participated in material and BOM analysis to swap component alternatives while maintaining rigorous performance standards.
Aug 20162 yrs 1 moAug 2018

· Test Plan Execution: Formulated and executed structured daily test cases to evaluate signal integrity, power supply ripple, and circuit safety boundaries. · Defect Log Tracking: Handled the full documentation lifecycle of hardware defects, serving as the central point of contact for resolving multi-team testing blocks. · Lab Bench Operations: Mastered the usage of physical validation lab equipment, including high-frequency digital oscilloscopes, spectrum analysers, and multi-meters.

NILESH’s AI Stack

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Education

Rajiv Gandhi Prodyogiki Vishwavidyalaya

Bachelor of Engineering, Electronics and Communication Engineering

Rajiv Gandhi Prodyogiki Vishwavidyalaya

20124 yrs2016
Indore Institute of Science and Technology

Bachelor of Engineering, Electrical, Electronics and Communications Engineering

Indore Institute of Science and Technology

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Headline

Executive Engineer at Secure Meters Limited

About

Experienced Technical Project Manager with a demonstrated history of working. Skilled in Pressure Handling, Team Building, Multi-task & Handle High-volume Workloads, and Punctuation. Strong project management professional with a Bachelor of Engineering - BE focused in Electronics and Communications Engineering from Indore Institute of Science & Technology, Indore 453 331.

Location

Indore

AI stack

claude code

grok

midjourney

ChatGPT

GroqCloud

Raycast AI

Work experience

Project Developer at Secure Meters Limited, Jun 2021 - Present · 5 yrs 5 mos, Udaipur, Rajasthan, India, Authored protocols and reports; specific to the validation of test methods Experienced in working with suppliers for the development of inspection methods Responsible for initiating, implementing and completing change control, deviations, investigations, impact/risk assessments, root cause analysis, and CAPAs. Performed process capability studies with FTY & Cpk indexes to analyze processes. Perform commissioning and validation for a new manufacturing facility, supporting software and author qualification protocols. Designed experiments and authored protocols, summary documentation, change controls and regulatory documentation. Managed deviation and non-conformance reports and investigations. Scheduled project activities in concert with the production schedule while meeting all milestones. Performed a variety of general validation activities, including the IQ/OQ/PQ activities for equipment. Provide Engineering support to fix or improve performance of existing systems.

Technical Project Co-ordinator at Appalto Electronics Pvt. Ltd., Aug 2018 - Sep 2020 · 2 yrs 2 mos, · Design Verification Testing (DVT): Conducted rigorous schematic verification and board-level validation on pre-production prototypes. · PCB & Component Validation: Evaluated PCB layouts, generated wiring diagrams, and managed hardware testing timelines to guarantee robust electronic signals. · Failure Analysis: Worked closely with design engineers to evaluate field and lab failure modes, executing Engineering Change Requests (ECR) to update circuit layouts accordingly. · Cost & Quality Analysis: Participated in material and BOM analysis to swap component alternatives while maintaining rigorous performance standards.

Junior Test Engineer at Appalto Electronics Pvt. Ltd., Aug 2016 - Aug 2018 · 2 yrs 1 mo, · Test Plan Execution: Formulated and executed structured daily test cases to evaluate signal integrity, power supply ripple, and circuit safety boundaries. · Defect Log Tracking: Handled the full documentation lifecycle of hardware defects, serving as the central point of contact for resolving multi-team testing blocks. · Lab Bench Operations: Mastered the usage of physical validation lab equipment, including high-frequency digital oscilloscopes, spectrum analysers, and multi-meters.

Education

Bachelor of Engineering, Electronics and Communication Engineering, Rajiv Gandhi Prodyogiki Vishwavidyalaya

Bachelor of Engineering, Electrical, Electronics and Communications Engineering, Indore Institute of Science and Technology