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NAKKA PAVAN SAI VENKATESH

VLSI Enthusiast | VIT’27 |

Bengaluru

2+ years of work experience

Maven Silicon
May 20242 yrs 2 mosPresent

The router accepts data packets from a single 8-bit port and routes them to three different destinations. Responsibilities : •Architectured the block level structure for the design •Implemented RTL and Verified using Verilog HDL •Synthesized the design

Education

Vellore Institute of Technology

Master of Technology, Electrical, Electronics and Communications Engineering

Vellore Institute of Technology

Gayatri Vidya Parishad College of Engineering (Autonomous)

Bachelor of Technology, Electrical, Electronics and Communications Engineering

Gayatri Vidya Parishad College of Engineering (Autonomous)

20204 yrs2024

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Headline

VLSI Enthusiast | VIT’27 |

About

I would like to contribute to the VLSI Industry with my acquired skill set and knowledge till now, aiming to excel in Physical Design and Verification. Digital world is a testimony of the contribution of VLSI industry . Embedding many thousands of transistor on one silicon semiconductor microchip.

Location

Bengaluru

Work experience

Advanced Physical Design and Verification at Maven Silicon, May 2024 - Present · 2 yrs 2 mos, The router accepts data packets from a single 8-bit port and routes them to three different destinations. Responsibilities : •Architectured the block level structure for the design •Implemented RTL and Verified using Verilog HDL •Synthesized the design

Education

Master of Technology, Electrical, Electronics and Communications Engineering, Vellore Institute of Technology

Bachelor of Technology, Electrical, Electronics and Communications Engineering, Gayatri Vidya Parishad College of Engineering (Autonomous)

NAKKA PAVAN SAI VENKATESH - Advanced Physical Design and Verification in Bengaluru | Tal