Viswateja Mummaneedi

2+ years of work experience

May 20253 mosJul 2025

Dhanbad, Jharkhand, India

Designed and implemented real-time digital signal processing systems on FPGA hardware as part of a research internship focused on bridging theoretical filter design with hardware realization. Derived discrete-time models for Leapfrog and 4th-order elliptic filters, performed fixed-point conversion to ensure hardware compatibility, and generated synthesizable Verilog HDL using MATLAB HDL Coder. Synthesized and validated the complete designs on a Zybo FPGA board using Xilinx Vivado, rigorously comparing FPGA outputs against SPICE and Simulink simulations to verify functional accuracy. Additionally developed an SPI-based communication interface with a PMOD AD5541A DAC, programmed ramp and sine waveform generation on the FPGA, and verified analog output signal integrity using an oscilloscope. Gained hands-on experience across the full hardware design flow — from algorithm-level modeling in MATLAB to physical hardware validation — with proficiency in fixed-point arithmetic, HDL synthesis, timing closure, and analog-digital interfacing. Key skills demonstrated: Verilog HDL · MATLAB HDL Coder · Xilinx Vivado · Fixed-Point Design · SPI Protocol · DAC Interfacing · SPICE/Simulink Co-simulation · FPGA Synthesis & Validation