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Mayur Patil

SOC Design Verification Engineer @ Intel Corporation | MTech in Embedded Systems Design (School Of VLSI)

Bengaluru

2+ years of work experience

Intel Corporation
Jul 20251 yr 2 mosPresent

Intel Corporation
Jul 20241 yrJun 2025

Mayur’s AI Stack

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Education

National Institute of Technology, Kurukshetra, Haryana

Master of Technology - MTech, Embedded System Design (School of Vlsi)

National Institute of Technology, Kurukshetra, Haryana

20232 yrs2025
Savitribai Phule Pune University

Bachelor of Engineering - BE, Electronics and Communications Engineering

Savitribai Phule Pune University

20194 yrs2023

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Headline

SOC Design Verification Engineer @ Intel Corporation | MTech in Embedded Systems Design (School Of VLSI)

About

Intel Corporation leverages contributions in design verification from a professional pursuing an MTech in Embedded System Design at NIT Kurukshetra. Paired with a strong foundation in Electronics and Communications Engineering from Savitribai Phule Pune University, the role emphasizes VLSI and verification competencies. Collaborative and detail-oriented, they work on advancing project quality and performance, supported by academic research and publications in intelligent technologies.

Location

Bengaluru

AI stack

claude code

Work experience

Design verifications Engineer at Intel Corporation, Jul 2025 - Present · 1 yr 2 mos

Design Verification Engineer at Intel Corporation, Jul 2024 - Jun 2025 · 1 yr

Education

Master of Technology - MTech, Embedded System Design (School of Vlsi), National Institute of Technology, Kurukshetra, Haryana

Bachelor of Engineering - BE, Electronics and Communications Engineering, Savitribai Phule Pune University

Mayur Patil - Design verifications Engineer in Bengaluru | Tal