---
title: "MANJUNATH P S - Designer in Bengaluru | Tal"
description: "Meet MANJUNATH P S, PCB Design Engineer | High-Speed & HDI PCB | Mentor Graphics Expedition | PADS Professional based in Bengaluru. AI stack includes gemini."
image: "https://tal.club/meet/manjunath-p-s/share-image"
---

# MANJUNATH P S on Tal

## Headline

PCB Design Engineer \| High\-Speed & HDI PCB \| Mentor Graphics Expedition \| PADS Professional

## About

I am a PCB Design Engineer with 2\.5\+ years of hands\-on experience in high\-density multilayer, HDI, high\-speed, and mixed\-signal PCB design\. I specialize in developing production\-ready PCB layouts using Mentor Graphics Expedition Enterprise and PADS Professional, with experience across 6,10,16 and 20\-layer board designs\. My technical expertise includes high\-speed routing, BGA fanout and escape routing, controlled impedance, length and delay matching, SI/PI considerations, backdrilling, via\-in\-pad, blind/microvias, buried vias, and complex multilayer stack\-up development\. I have worked with a wide range of interfaces and technologies, including DDR3/DDR4, LPDDR, SDRAM, MGT/High\-Speed Ethernet, USB 3\.0/2\.0, LVDS, CAN, HDMI, I²C, SPI, UART, NOR Flash, differential I/O, and clock distribution\. I have experience designing complex boards with 20\-layer HDI structures, blind/microvias, buried vias, via\-in\-pad, backdrilling, 0\.8 mm\-pitch processors, and 0\.6 mm\-pitch power controllers\. My high\-speed layout experience includes controlled impedance, P/N and group\-length matching, phase tuning, return\-path optimization, transition vias, crosstalk reduction, and 3W/5W spacing rules\. I also have hands\-on experience with DFM/DFA/DFT, IPC\-2221/IPC\-7351 guidelines, netlist audits, batch DRC, fabrication checks, Gerber generation, NC drill files, assembly/fabrication documentation, and manufacturing release\. I enjoy working closely with hardware engineers, mechanical teams, PCB fabricators, and assembly vendors to translate electrical requirements into reliable, manufacturable PCB designs\. Core Areas: PCB Design \| PCB Layout \| HDI \| High\-Speed PCB \| Multilayer PCB \| SI/PI \| BGA Routing \| DDR \| LPDDR \| MGT \| Ethernet \| USB \| LVDS \| CAN \| Mentor Expedition \| PADS Professional \| DFM/DFA/DFT

## Location

Bengaluru

## AI stack

gemini

## Work experience

Designer at Sienna ECAD Technologies Private Limited, May 2024 \- Present · 2 yrs 6 mos, Bengaluru

Printed Circuit Board Design Engineer at Sienna ECAD Technologies, 2024 \- Present · 2 yrs 10 mos, Lead end\-to\-end design and layout of high\-density HDI and multilayer boards up to 20 layers for computing, telecommunication and audio\-frequency applications using Mentor Graphics Expedition\. Establish comprehensive physical, electrical and spacing rules within Expedition & PADS Professional Constraint Manager, covering high\-speed differential pairs, matched lengths and clearance matrices\. Conduct critical placement and routing calculations and collaborate with fabrication partners to develop balanced, symmetrical dielectric layer stack\-ups with solid continuous reference ground planes\. Perform schematic capture, symbol creation and footprint creation in accordance with IPC standards\. Execute rigorous pre\- and post\-layout verification including netlist audits, batch DRCs, differential delay reports and mechanical CAD collision checks\. Prepared release packages including Gerber RS\-274X, NC drill files, assembly/fabrication drawings, board variant documentation\.

Internship Trainee at SiMask Technologies Pvt\.Ltd, Dec 2023 \- May 2024 · 6 mos, Bengaluru, Karnataka, India, Hands on Projects with STM32, Communication Protocol, Basic PCB design \(Ki\-Cad & Eagle\) Study of Basic Electronics \(Analog and Digital\) Hardware understanding of TI Platform \(Sitara\)

## Education

Bachelor of Technology \- BTech, Electronics and Communications Engineering, Kalasalingam University\- Electronics and Communication Engineering Department

High School Diploma, Class XII, PCM, SRI VISWASANTHI EDUCATIONAL INSTITUTIONS

[View the original profile](https://tal.club/meet/manjunath-p-s)

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