VLSI Engineer | Passionate About Chip Design, RTL Coding & ASIC/FPGA Development

India





Master of Technology - MTech, VLSI
Ramaiah Institute Of Technology

Bachelor of Engineering - BE, Electronics and Communications Engineering
Don Bosco Institute of Technology (D.B.I.T)
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I am an engineer currently pursuing my M.Tech in VLSI, with a strong interest in digital design, semiconductor technology, and hardware description languages like Verilog HDL and system Verilog. My academic journey and hands-on projects have equipped me with practical experience in VLSI design and verification Beyond academics, I manage a YouTube channel focused on memes and motivation, which has enhanced my creativity, content creation, and audience engagement skills. I am eager to leverage my technical expertise and creative mindset to contribute to cutting-edge innovations in the VLSI domain.
Bengaluru
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perplexity
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Digital Specialist at Codec Technologies Pvt. Ltd., Oct 2025 - Jan 2026 · 4 mos, Designed and simulated RTL modules covering combinational and sequential logic, aligning with industry ASIC design flow standards. Developed and executed Verilog-based testbenches to verify functional correctness, improving simulation coverage across all design modules. Executed full ASIC design flow including synthesis, gate-level simulation (GLS), and functional debugging methodologies. Internship certified under AICTE & ICAC-approved program, reinforcing professional VLSI design practices.
Research Engineer at VERSABYTE DATA SYSTEMS PRIVATE LIMITED - India, Dec 2023 - Jan 2025 · 1 yr 2 mos, India, Versabyte Data Systems focusses on Research, development and Manufacturing range of customized AC/DC and DC/DC switching power supplies and modules. I was working here as an R&D Engineer handling projects on Ship Bound Radar PSM, Rugged Power Supply and 7KW AC/DC converter. Proficient in Analog and Digital Circuit Design, Critical Circuit Analysis, Testing and debugging of Hardware and software Modules. Adept in MIL-GRADE Testing tools, both hardware and software tools.
Research And Development Engineer at Versabyte Data Systems, 2023 - 2024 · 1 yr, Designed and validated digital subsystems including Radar PSM modules and power supply circuits, delivering functional hardware prototypes. Executed FPGA-based prototyping for hardware–software co-design projects, verifying RTL functionality on Xilinx platforms. Performed timing analysis and critical path optimization to meet design constraints, applying ASIC-aligned FPGA workflows. Debugged analog and mixed-signal subsystems using oscilloscopes and logic analyzers, resolving signal integrity and functional issues. Collaborated cross-functionally with hardware and software teams to ensure successful system integration and on-time delivery.
Master of Technology - MTech, VLSI, Ramaiah Institute Of Technology
Bachelor of Engineering - BE, Electronics and Communications Engineering, Don Bosco Institute of Technology (D.B.I.T)