---
title: "K Bhoomika - Vlsi analyst in Greater Bengaluru Area | Tal"
description: "Meet K Bhoomika, VLSI Analyst @ Capgemini | Digital Design Verification, Verilog based in Greater Bengaluru Area."
image: "https://tal.club/meet/k-11/share-image"
---

# K Bhoomika on Tal

## Headline

VLSI Analyst @ Capgemini \| Digital Design Verification, Verilog

## About

Graduated from Presidency University Bangalore with a Bachelor of Technology \(BTech\) in Electronics and Communication Engineering\. Currently contributing as a VLSI Analyst at Capgemini, specializing in digital design verification using Verilog and SystemVerilog\. At Capgemini, supported simulation\-based verification and debugging of RTL designs while gaining expertise in verification methodologies, including assertions, constrained random verification, and functional coverage\. Skilled in AMBA APB protocol analysis, UVM\-based testbench architecture, and foundational Ethernet protocol concepts, with a solid understanding of Linux and RTL design\. Dedicated to fostering innovation, collaboration, and technical precision in design verification processes\.

## Location

Greater Bengaluru Area

## Work experience

Vlsi analyst at Capgemini, Aug 2025 \- Present · 1 yr, Banglore, • Gained hands\-on knowledge in Digital Design Verification using Verilog and SystemVerilog\. • Worked on verification concepts including assertions, constrained random verification, and functional coverage\. • Studied and analyzed AMBA APB protocol for module\-level verification\. • Developed understanding of UVM\-based verification methodologies and testbench architecture\. • Performed simulation\-based verification and debugging of RTL designs\. • Acquired basic understanding of Ethernet protocol and digital communication interfaces\.system

## Education

Bachelor of Technology \- BTech, Ece, Presidency University Bangalore

[View the original profile](https://tal.club/meet/k-11)

```json
{
  "@context": "https://schema.org",
  "@graph": [
    {
      "@type": "Person",
      "@id": "https://tal.club/meet/k-11#person",
      "name": "K Bhoomika",
      "url": "https://tal.club/meet/k-11",
      "image": "https://tal.club/meet/k-11/profile-photo.jpg",
      "description": "Meet K Bhoomika, VLSI Analyst @ Capgemini | Digital Design Verification, Verilog based in Greater Bengaluru Area.",
      "jobTitle": "Vlsi analyst",
      "worksFor": {
        "@type": "Organization",
        "name": "Capgemini"
      },
      "hasOccupation": {
        "@type": "Occupation",
        "name": "Vlsi analyst"
      },
      "homeLocation": {
        "@type": "Place",
        "name": "Greater Bengaluru Area"
      },
      "alumniOf": [
        {
          "@type": "EducationalOrganization",
          "name": "Presidency University Bangalore"
        }
      ],
      "mainEntityOfPage": {
        "@id": "https://tal.club/meet/k-11#webpage"
      }
    },
    {
      "@type": "ProfilePage",
      "@id": "https://tal.club/meet/k-11#webpage",
      "url": "https://tal.club/meet/k-11",
      "name": "K Bhoomika on Tal",
      "description": "Meet K Bhoomika, VLSI Analyst @ Capgemini | Digital Design Verification, Verilog based in Greater Bengaluru Area.",
      "dateModified": "2026-07-20T08:24:57.613Z",
      "isPartOf": {
        "@id": "https://tal.club/#website"
      },
      "mainEntity": {
        "@id": "https://tal.club/meet/k-11#person"
      },
      "primaryImageOfPage": {
        "@type": "ImageObject",
        "url": "https://tal.club/meet/k-11/profile-photo.jpg",
        "contentUrl": "https://tal.club/meet/k-11/profile-photo.jpg",
        "caption": "K Bhoomika profile photo on Tal"
      },
      "inLanguage": "en-IN"
    }
  ]
}
```