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K Bhoomika

VLSI Analyst @ Capgemini | Digital Design Verification, Verilog

Greater Bengaluru Area

1+ year of work experience

Capgemini
Aug 20251 yrPresent

Banglore

• Gained hands-on knowledge in Digital Design Verification using Verilog and SystemVerilog. • Worked on verification concepts including assertions, constrained random verification, and functional coverage. • Studied and analyzed AMBA APB protocol for module-level verification. • Developed understanding of UVM-based verification methodologies and testbench architecture. • Performed simulation-based verification and debugging of RTL designs. • Acquired basic understanding of Ethernet protocol and digital communication interfaces.system

Education

Presidency University Bangalore

Bachelor of Technology - BTech, Ece

Presidency University Bangalore

20214 yrs2025

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Headline

VLSI Analyst @ Capgemini | Digital Design Verification, Verilog

About

Graduated from Presidency University Bangalore with a Bachelor of Technology (BTech) in Electronics and Communication Engineering. Currently contributing as a VLSI Analyst at Capgemini, specializing in digital design verification using Verilog and SystemVerilog. At Capgemini, supported simulation-based verification and debugging of RTL designs while gaining expertise in verification methodologies, including assertions, constrained random verification, and functional coverage. Skilled in AMBA APB protocol analysis, UVM-based testbench architecture, and foundational Ethernet protocol concepts, with a solid understanding of Linux and RTL design. Dedicated to fostering innovation, collaboration, and technical precision in design verification processes.

Location

Greater Bengaluru Area

Work experience

Vlsi analyst at Capgemini, Aug 2025 - Present · 1 yr, Banglore, • Gained hands-on knowledge in Digital Design Verification using Verilog and SystemVerilog. • Worked on verification concepts including assertions, constrained random verification, and functional coverage. • Studied and analyzed AMBA APB protocol for module-level verification. • Developed understanding of UVM-based verification methodologies and testbench architecture. • Performed simulation-based verification and debugging of RTL designs. • Acquired basic understanding of Ethernet protocol and digital communication interfaces.system

Education

Bachelor of Technology - BTech, Ece, Presidency University Bangalore

K Bhoomika - Vlsi analyst in Greater Bengaluru Area | Tal