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Jyoshnavi Akiri

DRAM Product Engineer(LPDDR) at Micron Technology specializing in IC Design

Taiwan

1+ year of work experience

Micron Technology
Feb 20241 yr 5 mosJun 2025

Houli District, Taichung City, Taiwan

Specialize in LPDDR architecture, focusing on design, operation, and feature optimization. Conduct post-silicon validation and ensure functional integrity using Micron’s Mongoose tester. Utilize ATE test flows to validate DRAM products and optimize performance. Debug and enhance Tx/Rx circuits with equalization techniques like de-emphasis. Drive quality improvements, including RMA and QMON, to deliver competitive DRAM products. Perform data analysis, electrical diagnostics, and physical inspections to identify and resolve failure root causes. Refine testing strategies to improve product quality, maximize yield, and reduce test time. Forecast yield and handle System Burn-In Lot (SBL) and Quality Assurance Wafer Reprobe (QAWR) dispositions. Collaborate with design, boards, and ATE teams to improve yield and quality.

Jyoshnavi’s AI Stack

claude code
claude code
gemini
gemini
ChatGPT
ChatGPT
Microsoft Copilot
Microsoft Copilot

Education

National Sun Yat-sen University

Master's degree, Electrical Engineering

National Sun Yat-sen University

20212 yrs2023
Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

Bachelor's degree, electronics and communication engineering

Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

20164 yrs2020

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Headline

DRAM Product Engineer(LPDDR) at Micron Technology specializing in IC Design

About

Our team at Micron Technology thrives on innovation, and as a DRAM Product Engineer, I contribute to this with my expertise in Digital and Analog Integrated Circuit Design. Having completed my Master's in Electrical Engineering at National Sun Yat-Sen University, I apply cutting-edge techniques that were honed during my studies and further refined through hands-on experience. My educational journey began with a Bachelor's in Electronics and Communication Engineering at Vel Tech, setting the foundation for my current role where I excel in digital electronics and IC design, driving advancements in memory technology.

Location

Taiwan

AI stack

claude code

gemini

ChatGPT

Microsoft Copilot

Work experience

DRAM Product Engineer at Micron Technology, Feb 2024 - Jun 2025 · 1 yr 5 mos, Houli District, Taichung City, Taiwan, Specialize in LPDDR architecture, focusing on design, operation, and feature optimization. Conduct post-silicon validation and ensure functional integrity using Micron’s Mongoose tester. Utilize ATE test flows to validate DRAM products and optimize performance. Debug and enhance Tx/Rx circuits with equalization techniques like de-emphasis. Drive quality improvements, including RMA and QMON, to deliver competitive DRAM products. Perform data analysis, electrical diagnostics, and physical inspections to identify and resolve failure root causes. Refine testing strategies to improve product quality, maximize yield, and reduce test time. Forecast yield and handle System Burn-In Lot (SBL) and Quality Assurance Wafer Reprobe (QAWR) dispositions. Collaborate with design, boards, and ATE teams to improve yield and quality.

Education

Master's degree, Electrical Engineering, National Sun Yat-sen University

Bachelor's degree, electronics and communication engineering, Vel Tech Rangarajan Dr. Sagunthala R & D Institute of Science & Technology, Chennai

Jyoshnavi Akiri - DRAM Product Engineer in Taiwan | Tal