---
title: "Joy Poddar - Principal Engineer in Bengaluru | Tal"
description: "Meet Joy Poddar, Principal Engineer @Intel Corporation | System Engineering , FW architecture , Wireless | 10+ US Patents based in Bengaluru. AI stack includes claude and gemini."
image: "https://tal.club/meet/joy-poddar/share-image"
---

# Joy Poddar on Tal

## Headline

Principal Engineer @Intel Corporation \| System Engineering , FW architecture , Wireless \| 10\+ US Patents

## About

Senior R&D Leader \| Wireless SoC \| System & Architecture \| Driving Innovation from Concept to Mass Production With more than 2 decades in the semiconductor industry, I specialize in leading R&D organizations that deliver cutting\-edge Wireless SoC solutions for top\-tier consumer products\. I have a proven track record of building and managing multidisciplinary global teams, driving innovations from concept and architecture through system integration, validation, and high\-volume production\. Throughout my career at Intel, Infineon and Philips semiconductor, I’ve spearheaded development of 4G/5G cellular, Clients and Edge, shaping the SoC SW/FW architecture, noise mitigation , memory optimization, and performance optimization\. My leadership style blends technical depth with strategic execution, enabling successful delivery of first\-to\-market technologies and alignment with business goals\. Core strengths & expertise: • Leading large x\-functional R&D teams \(Systems, Architecture, FW, SW integration\) • System & SoC Architecture – top\-level design, performance, power & latency optimization • Driving end\-to\-end product development – from concept & simulation to post\-Silicon debug & mass production

## Location

Bengaluru

## AI stack

claude

gemini

## Work experience

Principal Engineer at Intel Corporation, Apr 2017 \- Present · 9 yrs 6 mos

Senior SW Architect at Intel Corporation, Feb 2011 \- Mar 2017 · 6 yrs 2 mos, Bangalore, Technical and disciplinary leadership of a highly skilled team of 10 system architects for different platforms \(hardware and software\) • Management of the globally used architectures • Trainer for UML & System architecture \. • Definition, planning, controlling and delivery of a platform architecture as well as hand\-over and training of the development teams • Responsibility for the interface towards the internal customer such as product management and sales as well as external suppliers for software and chipset deliveries • Responsibility for the realization within the development teams • Securing flexible solutions • Definition of the platform and the architecture for the next generation of mobile phones • Mapping of product concepts on technical platforms • Steering of predevelopment projects

Senior Software Architect at Infineon Technologies, Sep 2006 \- Jan 2011 · 4 yrs 5 mos, Bangalore

Software Architect at Philips, 2001 \- 2006 · 5 yrs, Bangalore, Philips Semiconductor

Scientist at DRDO, Bangalore, 2000 \- 2001 · 1 yr, Bangalore

Software Engineer at Siri Technologies, 1997 \- 2000 · 3 yrs, Bangalore

## Education

Master of Technology \- MTech, Data Science and Engineering, Birla Institute of Technology and Science, Pilani

Master of Science \- MS, Software Systems, Birla Institute of Technology and Science, Pilani

[View the original profile](https://tal.club/meet/joy-poddar)

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