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Jegadeesh Vontlin

Senior Firmware & Security Engineer · UEFI · coreboot · EDK II · Fuzzing · C · Rust · Sharing boot firmware internals

India

8+ years of work experience

AMD
Sep 20251 yr 1 moPresent

Bengaluru

AMI
Aug 20223 yrs 2 mosSep 2025

Chennai

Developed and maintained UEFI firmware modules within the Aptio V (EDK II) framework, contributing to customer-facing products across the BIOS vendor ecosystem. • Owned bug resolution and feature enhancements across core UEFI modules including UsbRndis, IPMI 2.0, AHCI, SMBIOS, and HddSmart — resolving issues at the UEFI specification level, not just symptom level. • Made independent open-source contributions to the IPMI driver boot sequence, including functional validation of the contributed features. • Reduced cross-module compatibility dependencies in multiple UEFI components, improving portability and maintainability of the APTIO-V firmware stack. • Authored detailed technical documentation for QrCodeLibrary based on full code-flow analysis against ISO/IEC 18004:2015. • Completed an intensive 6-month UEFI/PI architecture training program. • Filed a patent in UEFI — recognised with a department Superstar Award (November 2024).
Pricol Technologies - Engineering By Instinct
Nov 202110 mosAug 2022

Coimbatore

Designed and built a secure vehicle monitoring and data logging system from scratch, covering end-to-end security architecture, protocol selection, and embedded implementation. • Architected a telematics security solution integrating HTTPS and MQTTS over GSM/GPRS, with fallback encryption mechanisms for constrained connectivity scenarios. • Implemented custom APIs for HTTPS and MQTTS communication using GSM AT commands, written against the NMEA 0183 and FIPS 180-4 (SHA) standards. • Designed the SPI Flash memory layer for live GPS data storage and TCP/IP payload logging. • Evaluated and selected optimal cryptographic schemes for data-in-transit security under embedded resource constraints.
Jun 20183 yrs 6 mosNov 2021

Madurai, Tamil Nadu, India

Worked across wireless protocols, network security, and cryptographic implementation — with a strong focus on security research, fuzzing, and standards-based implementation from RFCs and NIST specifications. • Implemented a Deterministic Random Bit Generator (DRBG) in C from scratch, based on NIST SP 800-90A/B/C specifications, validated against official NIST test vectors. • Implemented WebSocket protocol in C from RFC 6455, including UI integration and full black-box and white-box testing. • Fuzzed network protocols across the OSI stack using AFL++, boofuzz, and wfuzz to identify security vulnerabilities; researched and reproduced known CVEs including AMNESIA:33, NAME:WRECK, and INFRAHALT. • Analysed TLS 1.2 (RFC 5246) implementations in OpenSSL, mbed TLS, and WolfSSL, including cipher suite analysis, certificate chain verification, and fuzzing with testssl and ssl-analyze. • Performed unit testing of MD5, HMAC, SHA-1, SHA-2, AES-128, and AES-256 implementations against NIST test vectors. • Researched Zigbee protocol architecture, ZDO interactions, endpoint profiles, and Nordic Zigbee SDK internals. • Analysed Nordic BLE serialisation including the full RX/TX flow of the BLE Peripheral HRS example. • Debugged IPv6 stack issues on STM32 microcontrollers and Raspberry Pi, using Scapy-based custom test scripts for protocol-level white-box testing. • Operated hardware-level automation testing with Maxwell IWL Pro across the full OSI stack

Jegadeesh’s AI Stack

antigravity
antigravity
claude
claude
deepseek
deepseek
gemini
gemini

Education

BITS Pilani Work Integrated Learning Programmes

Master of Technology - MTech, Embedded Systems

BITS Pilani Work Integrated Learning Programmes

20212 yrs2023
KLN College of Engineering, Madurai, India

Bachelor of Engineering - BE, Electronics and Instrumentation engineering

KLN College of Engineering, Madurai, India

20115 yrs2016

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Headline

Senior Firmware & Security Engineer · UEFI · coreboot · EDK II · Fuzzing · C · Rust · Sharing boot firmware internals

About

I’m a host boot firmware and embedded security engineer with 8 years of experience spanning UEFI/BIOS development, embedded network security, and low-level cryptographic implementation. My career has been built at the intersection of firmware engineering and security research. At AMI (American Megatrends), I owned UEFI module development across the full Aptio V / EDK II stack — working at the specification level across IPMI, AHCI, UsbRndis, NVMe & SMBIOS. — and filed a patent in UEFI firmware. — I built a standalone DXE driver to detect and display NVMe SSDs on the setup page, using EDK2’s standard NVMe PassThru protocol with Identify Controller command parsing to make detection work regardless of which driver stack (AMI or vendor OpROM) bound the device. Before that, I spent three years at Emfios Technologies, I worked across : fuzzing network protocols across the OSI stack with AFL++, boofuzz, and wfuzz; Analysing TLS 1.2 from RFC 5246 in mbed TLS and OpenSSL and evaluating the crypto algorithms with test vectors. Building a DRBG from scratch against NIST SP 800-90A/B/C; and researching real-world vulnerabilities including AMNESIA:33, NAME:WRECK, and INFRAHALT. That combination — deep firmware internals plus hands-on security research — is what drives the work I care about most.

Location

India

AI stack

antigravity

claude

deepseek

gemini

Work experience

Senior Software Engineer at AMD, Sep 2025 - Present · 1 yr 1 mo, Bengaluru

Senior System Software Engineer at AMI, Aug 2022 - Sep 2025 · 3 yrs 2 mos, Chennai, Developed and maintained UEFI firmware modules within the Aptio V (EDK II) framework, contributing to customer-facing products across the BIOS vendor ecosystem. • Owned bug resolution and feature enhancements across core UEFI modules including UsbRndis, IPMI 2.0, AHCI, SMBIOS, and HddSmart — resolving issues at the UEFI specification level, not just symptom level. • Made independent open-source contributions to the IPMI driver boot sequence, including functional validation of the contributed features. • Reduced cross-module compatibility dependencies in multiple UEFI components, improving portability and maintainability of the APTIO-V firmware stack. • Authored detailed technical documentation for QrCodeLibrary based on full code-flow analysis against ISO/IEC 18004:2015. • Completed an intensive 6-month UEFI/PI architecture training program. • Filed a patent in UEFI — recognised with a department Superstar Award (November 2024).

Research And Development Engineer at Pricol Technologies - Engineering By Instinct, Nov 2021 - Aug 2022 · 10 mos, Coimbatore, Designed and built a secure vehicle monitoring and data logging system from scratch, covering end-to-end security architecture, protocol selection, and embedded implementation. • Architected a telematics security solution integrating HTTPS and MQTTS over GSM/GPRS, with fallback encryption mechanisms for constrained connectivity scenarios. • Implemented custom APIs for HTTPS and MQTTS communication using GSM AT commands, written against the NMEA 0183 and FIPS 180-4 (SHA) standards. • Designed the SPI Flash memory layer for live GPS data storage and TCP/IP payload logging. • Evaluated and selected optimal cryptographic schemes for data-in-transit security under embedded resource constraints.

Embedded Firmware Engineer at EMFIOS Technologies Pvt Ltd., Jun 2018 - Nov 2021 · 3 yrs 6 mos, Madurai, Tamil Nadu, India, Worked across wireless protocols, network security, and cryptographic implementation — with a strong focus on security research, fuzzing, and standards-based implementation from RFCs and NIST specifications. • Implemented a Deterministic Random Bit Generator (DRBG) in C from scratch, based on NIST SP 800-90A/B/C specifications, validated against official NIST test vectors. • Implemented WebSocket protocol in C from RFC 6455, including UI integration and full black-box and white-box testing. • Fuzzed network protocols across the OSI stack using AFL++, boofuzz, and wfuzz to identify security vulnerabilities; researched and reproduced known CVEs including AMNESIA:33, NAME:WRECK, and INFRAHALT. • Analysed TLS 1.2 (RFC 5246) implementations in OpenSSL, mbed TLS, and WolfSSL, including cipher suite analysis, certificate chain verification, and fuzzing with testssl and ssl-analyze. • Performed unit testing of MD5, HMAC, SHA-1, SHA-2, AES-128, and AES-256 implementations against NIST test vectors. • Researched Zigbee protocol architecture, ZDO interactions, endpoint profiles, and Nordic Zigbee SDK internals. • Analysed Nordic BLE serialisation including the full RX/TX flow of the BLE Peripheral HRS example. • Debugged IPv6 stack issues on STM32 microcontrollers and Raspberry Pi, using Scapy-based custom test scripts for protocol-level white-box testing. • Operated hardware-level automation testing with Maxwell IWL Pro across the full OSI stack

Education

Master of Technology - MTech, Embedded Systems, BITS Pilani Work Integrated Learning Programmes

Bachelor of Engineering - BE, Electronics and Instrumentation engineering, KLN College of Engineering, Madurai, India