Headline

Senior Digital Design Engineer at CoreEL Technologies

About

As an experienced SoC Design Engineer, I specialize in RTL coding, DSP, FPGA design, and digital design. With over 3+ years of expertise in RTL coding and digital design, I have developed a strong foundation in building robust and efficient systems. I am proficient in navigating all stages of project lifecycles, including design, verification, validation, customer delivery, and thorough documentation. My hands-on approach and attention to detail ensure the successful execution of high-quality solutions tailored to project requirements. Driven by a passion for innovation and excellence, I continuously strive to enhance my skills and contribute to cutting-edge technology developments in the semiconductor industry.

Location

Bengaluru

AI stack

claude code

gemini

kimi

openai

ChatGPT

Wispr Flow

Work experience

Senior Digital Design Engineer at CoreEL Technologies, Aug 2026 - Present · 3 mos, Bengaluru, FPGA RTL Design Engineer with 3+ years of experience in FPGA Development, RTL Design, High-Speed Digital Design, DSP and Multi-Channel Data Acquisition, with hands-on expertise in Xilinx Virtex UltraScale, Kintex UltraScale and Virtex-7 platforms. Strong in VHDL RTL Design, Digital Logic, FSM, Pipelining, CDC, Asynchronous FIFO, STA, Timing Constraints, Synthesis, Implementation and Timing Closure. Experienced in Radar and Electronic Warfare (EW) systems involving high-speed ADC acquisition, processing, buffering, packetization, streaming and multi-FPGA communication. Skilled in JESD204B/C, Aurora, LVDS, SERDES, DDR3/DDR4, BRAM, FIFO, AXI4, AXI4-Lite, AXI4-Stream and 10G Optical Communication. Strong DSP experience with DDC, DUC, DDS, FFT, Digital Filtering, Phase Synchronization and Phase Compensation. Experienced in RTL Simulation, FPGA Bring-up, Hardware Debugging, System Validation and MATLAB-based signal analysis. Contributed to ±4° phase synchronization.

Design Engineer at CoreEL Technologies, Aug 2023 - Jul 2026 · 3 yrs, Bangalore, RTL Validation on FPGA, VHDL code coverage, Matlab Modeling, TCL Scripting, System Level Validation, ATP, System Delivery.

Student Intern at CMTI, Bangalore, Aug 2022 - Oct 2022 · 3 mos, Bengaluru, Karnataka, India

Student Intern at ITI Limited, Oct 2021 - Oct 2021 · 1 mo, Bengaluru, Karnataka, India, learnt something new about how PCB's are manufactured , injection moulding and how R and D dept. is usefull in manufacturing companies.

Education

Bachelor of Engineering - BE, Electronic and Communications Engineering Technology/Technician, nitte meenakshi institute of technology

Jawahar Navodaya Vidyalaya - JNV