Project Manager - Algorithms at KLA-Tencor

Chennai

Chennai, Tamil Nadu, India

Beaverton, Oregon
Phoenix, Arizona Area

Tempe,Az

Tempe, AZ



PhD, Electrical Engineering
Arizona State University

MS, Electrical Engineering - Semiconductor Devices
Arizona State University
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Electrical Enginner working in the field of semiconductor devices, process control and applications.
Chennai
antigravity
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Project Manager - Algorithms at KLA, Dec 2025 - Present · 9 mos, Chennai
Technical Lead, Product Research at KLA, Dec 2022 - Jun 2026 · 3 yrs 7 mos, Chennai, Tamil Nadu, India
Field Applications Engineer at KLA, Jun 2018 - Dec 2022 · 4 yrs 7 mos, Beaverton, Oregon, • Responsible for providing technical applications support for the development and implementation of KLA-Tencor products in customer fabrication facilities. • Works on complex problems where analysis of situations or data requires an in depth evaluation of various factors • Perform product diagnosis, problem resolution, interface with software and systems engineering to verify that hardware and software problems have been resolved. Works closely with engineering teams to improve the products and implement plans • Assists sales staff in assessing potential application of company products to meet customer needs and preparing detailed product specifications
Design Engineer Intern at ON Semiconductor, Jun 2011 - Aug 2011 · 3 mos, Phoenix, Arizona Area, Process and device simulation for power MOSFET devices using ISE & Synopsis Sentaurus TCAD tools Worked on the optimization of the state-of-the-art trench power MOSFET technologies using the above simulation tool. Power FET lab testing and characterization - Breakdown and leakage current.
Teaching Assistant - VHSIC Hardware Design Language at Arizona State University, Aug 2010 - Dec 2017 · 7 yrs 5 mos, Tempe,Az, Help students learn VHDL,by providing them with different projects in the lab to test their understanding of the concepts and the design of ASIC and FPGA systems. The students are tested based on their CMOS digital logic, VHDL coding and modeling (VHDL datatypes,testbenches etc), synthesis and verification, and FPGA design basics involving finite state machine analysis, timing issues and memory structures.
Graduate Research Assistant at Arizona State University, Aug 2007 - Dec 2017 · 10 yrs 5 mos, Tempe, AZ
PhD, Electrical Engineering, Arizona State University
MS, Electrical Engineering - Semiconductor Devices, Arizona State University