Headline

Engineering Leadership, Program Delivery at TP Vision

About

I am a PMP® certified Senior Software Leader with over 20 years of experience driving technology excellence and product development in the global consumer electronics market. My career has been defined by leading complex, large-scale programs across Asia and Europe, consistently delivering high-quality software for volumes exceeding 6M+ devices. Throughout my tenure at organizations associated with, I have navigated the intersection of deep-tech architecture and strategic business goals. I specialize in: 1. Global Program Leadership: Overseeing end-to-end Android TV software development and factory integration for top-tier global brands. 2. Deep-Tech Expertise: Driving architectural excellence across multiple SoC generations, with a focus on GPU/CPU optimization, Linux Kernel, and system stability. 3. Operational Excellence: Implementing data-centric approaches to achieve significant cost optimizations and performance improvements in the field. 4. Strategic Collaboration: Building strong partnerships with industry giants like Google and major SoC vendors to resolve "production-stopper" technical challenges. I am passionate about building and mentoring high-performing engineering teams and leveraging Agile methodologies to stay competitive in rapidly evolving markets. Key Expertise: Program Management | Software Development | Android TV Internals | SoC Architecture | Embedded Systems | Stakeholder Management | Strategic Leadership.

Location

Bengaluru

AI stack

claude

gemini

notebooklm

openai

ChatGPT

Work experience

Engineering Leadership, Program Delivery at TP Vision, Jun 2020 - Present · 6 yrs 4 mos, Bengalore, **Strategic Program Governance & Delivery** - Governed end-to-end software delivery lifecycles (SDLC) for high-volume consumer electronics and smart TV platforms from architecture to market release. - Orchestrated Change Request (CR) frameworks, release milestones, and risk mitigation strategies across cross-functional global engineering teams. - Managed silicon/SoC vendor partnerships and platform alignment to ensure on-time release gate approvals. *Systems Architecture & Performance Engineering** - Architected OS-level performance optimizations, SoC stability frameworks, and graphics acceleration pathways for embedded and display systems. - Oversaw low-level Android system internals, display drivers, HAL integration, and memory optimization to drive seamless user experience. - Established system performance baselines, latency reduction targets, and architectural guidelines across complex software stacks. **Cross-Functional & Operational Leadership** - Bridged deep software engineering architecture with executive business goals to streamline platform delivery cadences. - Unblocked critical technical release gates, managed high-impact platform dependencies, and standardized program execution frameworks. - Championed quality engineering, security policy compliance, and continuous optimization across multi-site engineering initiatives.

R&D Manager & Systems Architect at TP Vision, Jun 2012 - Oct 2020 · 8 yrs 5 mos, Bengaluru, Karnataka, India, • Architectural Leadership: Spearheaded team focused on Storage, System Performance, Security, and Graphics across 4 generations of SoC platforms. • Performance Optimization: Contributed to complex technical analysis in the areas of memory budgeting, CPU cycle optimization, and 2D/3D graphics acceleration to improve user experience. • Stability & Security: Achieved peak system stability through deep-dive software design audits and led initiatives for OSS auditing and DRM key provisioning.

Software Architect at Trident Microsystems, Dec 2010 - Jun 2012 · 1 yr 7 mos, Bengaluru, Karnataka, India, • SoC Integration: Demonstrated expertise in Graphics driver development for SoC platforms and integrated partner DVB middleware. • Resource Optimization: Reused Set-Top Box (STB) solutions for TV platforms, resulting in a significant reduction in engineering resource requirements. • Platform Redesign: Enhanced performance on multicore platforms by redesigning Inter-Process Communication (IPC) mechanisms.

Software Lead at NXP & Trident Microsystems, May 2007 - Jun 2012 · 5 yrs 2 mos, SoC Integration: Demonstrated expertise in Graphics driver development for NXP SoC platforms and integrated partner DVB middleware. Resource Optimization: Reused Set-Top Box (STB) solutions for TV platforms, resulting in a significant reduction in engineering resource requirements. Platform Redesign: Enhanced performance on multicore platforms by redesigning Inter-Process Communication (IPC) mechanisms.

Senior Technical Leader at NXP Semiconductors, May 2007 - Jun 2010 · 3 yrs 2 mos, Bengaluru, Karnataka, India, • SoC Integration: Demonstrated expertise in Graphics driver development for SoC platforms and integrated partner DVB middleware. • Resource Optimization: Reused Set-Top Box (STB) solutions for TV platforms, resulting in a significant reduction in engineering resource requirements. • Platform Redesign: Enhanced performance on multicore platforms by redesigning Inter-Process Communication (IPC) mechanisms.

Software Developer at Philips, May 2003 - May 2006 · 3 yrs 1 mo, Bengaluru, Karnataka, India

Education

Engineer’s Degree, Electrical, Electronics and Communications Engineering, University of Mysore