---
title: "Gaurang Chaudhari - Intern in Bengaluru | Tal"
description: "Meet Gaurang Chaudhari, Digital VLSI | RTL Design | Design Verification | Verilog | SystemVerilog | ASIC based in Bengaluru. AI stack includes antigravity, claude, and codex. Explore public work links including github."
image: "https://tal.club/meet/gaurang-chaudhari/share-image"
---

# Gaurang Chaudhari on Tal

## Headline

Digital VLSI \| RTL Design \| Design Verification \| Verilog \| SystemVerilog \| ASIC

## About

I am an engineering graduate focused on Digital VLSI, RTL Design, and Design Verification\. My technical interests include RTL development, digital logic design, finite state machines, combinational and sequential circuits, counters, registers, FIFOs, clock domain crossing, metastability, timing analysis, and digital communication protocols\. I work with Verilog HDL and SystemVerilog and have hands\-on experience developing RTL modules, building testbenches, running simulations, analyzing waveforms, and debugging functional issues\. On the verification side, I am building experience with self\-checking testbenches, assertions, functional coverage, constrained\-random verification, scoreboards, monitors, drivers, and UVM\-based verification concepts\. I am particularly interested in entry\-level opportunities in: • RTL Design • Digital Design • ASIC Design • Design Verification • RTL Verification I enjoy understanding how digital systems work at the hardware level, implementing them in RTL, and systematically verifying their functionality and corner cases\. Tech: Verilog \| SystemVerilog \| Digital Logic \| RTL Design \| FSM \| CDC \| FIFO \| STA \| SPI \| UART \| Design Verification \| UVM

## Location

Bengaluru

## AI stack

antigravity

claude

codex

gemini

ChatGPT

## Work experience

Intern at DIGITECH ENGINEERS, Dec 2024 \- Apr 2025 · 5 mos, Pune District, • Supported real\-time machine monitoring and IIoT\-based manufacturing systems\. • Performed system configuration, troubleshooting, software deployment, and technical issue resolution\. • Worked with technical systems in a manufacturing environment, strengthening problem\-solving and debugging skills\.

Executive at Apitoria Pharma Private Limited, Jul 2024 \- Oct 2024 · 4 mos, Vishakhapatnam, • Assisted with electrical system inspection, preventive maintenance, troubleshooting, and technical documentation\. • Worked with technical systems and maintenance processes in a manufacturing environment\.

## Education

Bachelor of Technology \- BTech, Electrical and Electronics Engineering, Vellore Institute of Technology

Post Graduate Diploma in Advanced Computing, Computer Science, Centre for Development of Advanced Computing \(C\-DAC\)

## Public links

- github: https://github\.com/GauGat21

[View the original profile](https://tal.club/meet/gaurang-chaudhari)

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