---
title: "Tilak Sai - Design Verification Trainee in Bengaluru | Tal"
description: "Meet Tilak Sai, Electronics and communication student with interest in field of electronics,design who’s eager to secure skill for professional growth based in Bengaluru. AI stack includes cursor, grok, and hugging face."
image: "https://tal.club/meet/g-sai-tilak/share-image"
---

# Tilak Sai on Tal

## Headline

Electronics and communication student with interest in field of electronics,design who’s eager to secure skill for professional growth

## About

I am a Bachelor of Engineering graduate in Electronics and Communication Engineering from Sapthagiri College of Engineering and completed my training in design verification course from Maven Silicon,aspiring to build a career as a VLSI Design Verification Engineer\. I have a strong interest in digital design, verification methodologies, and semiconductor technologies\. My key accomplishment projects are, I developed reusable UVM\-based verification environments for protocols including I2C VIP, AXI Interconnect, and APB\-SPI\. These projects strengthened my understanding of SystemVerilog, UVM, communication protocols, and functional verification using Synopsys VCS, QuestaSim, and Xilinx ISE\. I am continuously enhancing my technical skills in SystemVerilog, Verilog, UVM, C\+\+, and Python, while expanding my knowledge of digital design, verification methodologies, and industry best practices\. I enjoy solving technical problems, learning emerging semiconductor technologies, and staying up to date with advancements in VLSI and the electronics industry\. Outside of technology, I enjoy following global business trends and financial markets, which help me broaden my perspective and analytical thinking\. I am actively seeking opportunities as a Design Verification Engineer, where I can contribute, learn from experienced professionals, and grow within the semiconductor industry\.

## Location

Bengaluru

## AI stack

cursor

grok

hugging face

langgraph

lovable

replit

## Work experience

Design Verification Trainee at Maven Silicon Softech Pvt Ltd, Jun 2025 \- Jun 2026 · 1 y, Bangalore

VLSI Design Intern at Internz Learn, Jan 2025 \- May 2025 · 4 mo, Bangalore

## Education

Bachelor of Technology \- BTech, Electrical, Electronic and Communications Engineering Technology/Technician, Visvesvaraya Technological University

[View the original profile](https://tal.club/meet/g-sai-tilak)

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