Headline

Product Electronic Engineer 2 @Vivo India | B.Tech. ECE ’24 | Former Microsoft LSA

About

Product Engineer with hands-on experience in FATP FPY analysis, hardware–software debugging, and root-cause analysis of mobile device performance issues. At Vivo India, I’ve worked extensively on RF Antenna modules (GSM, WCDMA, LTE, NR),camera, audio and display systems, software diagnostics, and PDMS server log analysis—building a strong foundation in system-level troubleshooting and functional verification.During my time in manufacturing, I implemented Kaizen-based improvements that enhanced line efficiency and strengthened process stability—giving me practical insight into quality, reliability, and data-driven optimization.Now, I’m actively seeking roles in Design for Test (DFT) and Design Verification (DV) within semiconductor design. I’ve developed solid skills in VLSI design flow, RTL coding (Verilog), digital electronics, and verification fundamentals, and I’m eager to contribute to teams building robust, high-performance silicon.Outside of engineering, I run Cyber Blog (cyberblogforu.com), where I explore cybersecurity, hardware, and emerging technologies—reflecting my commitment to secure, intelligent, and future-ready design.Open to connecting with engineers, mentors, and teams working in chip design, DFT, DV, and embedded hardware innovation.

Location

Varanasi

AI stack

claude

gemini

github copilot

midjourney

Adobe Firefly

ChatGPT

Work experience

Product Engineer II at vivo India, Dec 2023 - Mar 2026 · 2 yrs 4 mos, Greater Noida, - Analyzing and troubleshooting production anomalies for continuous improvement and functional reliability. - Identifying and controlling safety, reliability, and quality issues in production processes. - Conducting root cause analysis to address non-conforming devices and prevent abnormalities. - Supporting new product introductions, material trials, and project guidance while adhering to schedules and quality standards. - Applying electronic and circuit design knowledge, using testing tools like oscilloscopes and network analyzers for process diagnosis. - Implementing lean manufacturing principles such as defining value, mapping value streams, creating flow, establishing pull, and pursuing perfection, which optimize efficiency and reduce waste. - Utilizing Six Sigma methodologies for process optimization and defect reduction through data-driven approaches like DMAIC (Define, Measure, Analyze, Improve, Control). - Collaborating with cross-functional teams to gain production feedback and enhance workflows. - Maintaining thorough process documentation and using software tools for schematic analysis and monitoring. - Monitoring production lines to promptly handle abnormalities while maintaining safety and efficiency. - Providing technical support for manufacturing hardware and software, contributing to process automation and quality control initiatives.

Microsoft Beta Student Ambassador at Microsoft, Sep 2023 - Apr 2024 · 8 mos, • Organized and hosted a Microsoft Cloud Skill Challenge, promoting tech expertise and collaboration in the local community. • Facilitated hands-on learning and innovation to enhance participants' skills in cloud technology. • Successfully increased engagement and interest in tech-related activities among community members.

Microsoft Alpha Student Ambassador at Microsoft, Aug 2023 - Sep 2023 · 2 mos, Hybrid, • Successfully deployed Azure Static Web Apps for efficient web hosting. • Completed technical onboarding process to onboard smoothly into new projects. • Collaborated with cross-functional teams to optimize web performance and user experience. • Implemented innovative solutions to enhance website functionality and user engagement.

Microsoft Student Ambassador at Microsoft, Jul 2023 - Aug 2023 · 2 mos, Greater Noida, • I am honored to be chosen as a Microsoft Learn Student Ambassador.

VLSI – Front End Hardware Digital Design at PinE Training Academy of VLSI & Embedded, Mar 2023 - Aug 2023 · 6 mos, Greater Noida, Uttar Pradesh, India, Hardware Digital Design Using HDL & Schematics And Implementation On FPGA.

Internship Trainee at Maven Silicon, Jul 2022 - Oct 2022 · 4 mos, Dynamic and results-driven intern with hands-on experience in VLSI SoC design utilizing Verilog HDL. Contributed to the development of System-on-Chip (SoC) designs. Implemented and verified digital logic circuits. Applied knowledge of RTL design, synthesis, and timing analysis to optimize circuit performance. Eager to leverage skills and continue learning in the field of semiconductor design.

Education

Bachelor of Technology - BTech, Electronics and Communications Engineering, Galgotias College of Engineering and Technology

Intermediate, PCM, S.R.V.S. School Sikanderpur

Public links

cyberblogforu.com: https://cyberblogforu.com/about