Headline

ASIC Engineer, Design @Meta NITK | VLSI Design

About

Currently contributing as a Design Verification Engineer at Samsung Semiconductor, applying advanced skills in SystemVerilog, Verilog, and Python to support cutting-edge semiconductor projects. Pursuing a Master of Technology in VLSI Design at the National Institute of Technology Karnataka, building on a strong foundation from a BTech in Electronics and Communications Engineering at LNCT Group of Colleges. Combines technical expertise with academic rigor to empower teams in delivering precise and efficient design validation solutions in the semiconductor domain.

Location

India

AI stack

cursor

hugging face

meta

openai

Work experience

ASIC Design Engineer at Meta, Aug 2025 - Present · 11 mos, Bengaluru, Karnataka, India

Design Verification Engineer at Samsung Semiconductor, Jul 2024 - Jun 2025 · 1 yr, Bengaluru, Karnataka, India

Education

Master of Technology - MTech, VLSI Design, National Institute of Technology Karnataka

Bachelor of Technology - BTech, Electronics and Communications Engineering, LNCT Group of Colleges