Automation Engineer at Intel | M.Tech. in Cyber Security Gold Medalist 🥇| GATE 2022 Qualified | Network Security, Python and Automation

Hybrid

Bengaluru, Karnataka, India






Master of Technology - MTech, Cyber Security
Nirma University

Bachelor of Engineering - BE, Computer Engineering
SVIT, Vasad Official
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Ambitious, hardworking and resilient automation engineer with a strong foundation in cybersecurity, networking and software engineering. M.Tech (Cyber Security) Gold Medalist and GATE 2022 qualified professional. Currently working at Intel, hands‑on experience in building automated workflows, developing custom tools and improving engineering efficiency. Specializing in developing robust QA strategies, designing end-to-end automation workflows and reducing component QA time drastically. Skilled in computer networking, network and information security, scripting and clean code practices, supported by certifications and industry training in Python and software craftsmanship. Eager to keep learning, contributing to secure and scalable automation solutions and collaborating with cross‑functional teams on impactful projects in security, networking and infrastructure automation.
Bengaluru
gemini
github copilot
mcp
githubcopilot
Microsoft Copilot
Automation Engineer at Intel Corporation, Jul 2024 - Present · 2 yrs 4 mos, Hybrid, Led PDK QA across 5 technology nodes, expanding test coverage by 65% to minimize release defects. Slashed flow execution runtime by 70% by refactoring legacy code with SOLID principles and Python multiprocessing. Designed agentic AI workflows and leveraged Copilot to autonomously patch edge cases and resolve flow bottlenecks. Built modular Python/Tcl scripts for multi-vendor EDA tools and integrated validation flows into Jenkins pipelines.
Graduate Technical Intern at Intel Corporation, Jun 2023 - Jun 2024 · 1 yr 1 mo, Bengaluru, Karnataka, India, Developed Python and SKILL scripts to streamline PDK component development and execute rigorous quality checks. Engineered an automated workflow interfacing with Cadence Virtuoso to validate transistor behavior against target benchmarks across process revisions.
Master of Technology - MTech, Cyber Security, Nirma University
Bachelor of Engineering - BE, Computer Engineering, SVIT, Vasad Official