Director, Sensor and LSI at SAMSUNG SEMICONDUCTOR INDIA RESEARCH
Bangalore Urban, Karnataka, India

Bengaluru Area, India

Santa Clara, California


Santa Clara

Palo Alto, California

Bangalore


Master of Science (MS), Electrical Engineering
Stanford University

Bachelor's degree, Electrical and Electronics Engineering
Indian Institute of Technology, Madras
Join Aravind and 10k+ other professionals on
Tal is the app where bosses meet engineers & builders directly, without middlemen
Download Tal BossDirector, Sensor and LSI at SAMSUNG SEMICONDUCTOR INDIA RESEARCH
Electrical Engineering graduate from Stanford University with 17+ years of industry experience in Hardware design. Did my BTech from IIT Madras and worked as a hardware engineer with Cisco Systems, Intel and Samsung. My areas of expertise include micro-architecture development and RTL design, verification. Have worked across various domains like Networks, Memory Controllers and Image Processing. Currently working on CMOS Image Sensors - from specifications definition, Project Execution, Tape Out to Post Silicon Support
Bengaluru
claude
Director at Samsung Semiconductor India, Mar 2024 - Present · 2 yrs 7 mos, Bangalore Urban, Karnataka, India
Associate Director at Samsung Semiconductor India, Mar 2019 - Mar 2024 · 5 yrs 1 mo
Senior Manager at Samsung Semiconductor India, Mar 2018 - Feb 2019 · 1 yr
Chief Engineer at SAMSUNG R&D INSTITUTE INDIA - BANGALORE PRIVATE LIMITED, Aug 2014 - Feb 2017 · 2 yrs 7 mos, Bengaluru Area, India, Working on Hardware Architecture Analysis, micro-architecture and RTL design of Image Processing and Computer Vision related IPs. Also involved in project management and leading a design team
Silicon Architecture Engineer at Intel Corporation, May 2013 - Jul 2014 · 1 yr 3 mos, Santa Clara, California, Worked on the micro-architecture and RTL design of memory controller for Xeon-Phi product
Graduate Teaching Assistant at Stanford University, Sep 2012 - Jan 2013 · 5 mos, Graduate TA for IC Fabrication Processes Course (EE212)
Graduate Technical Intern at Intel Corporation, Jun 2012 - Sep 2012 · 4 mos, Santa Clara, Worked on formal LEC
Graduate Student at Stanford University, Aug 2011 - Apr 2013 · 1 yr 9 mos, Palo Alto, California, Depth: Electronic Circuits Breadth: Semiconductor Devices, Computer Hardware
Hardware Engineer at Cisco, Jul 2007 - Jul 2011 · 4 y, Bangalore
Master of Science (MS), Electrical Engineering, Stanford University
Bachelor's degree, Electrical and Electronics Engineering, Indian Institute of Technology, Madras