VLSI | Semiconductor Industry | Digital IC Design | Verilog | FPGA | RTL to GDSII
Banglore







Master of Engineering, VLSI
Gandhi Institute of Technology and Management (GITAM)

Bachelor of Technology
Brindavan College
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Aspiring VLSI Engineer | Interested in Physical Design & Semiconductor Technology I am passionate about VLSI design and the semiconductor industry, with a growing focus on Physical Design and Digital IC implementation. My interests span the complete journey of an integrated circuit—from RTL design to physical implementation, including floorplanning, placement, clock tree synthesis, routing, and timing optimization. Currently, I am building my technical foundation through hands-on projects and tools such as Vivado, MATLAB, LTspice, and Verilog. I am eager to explore opportunities in the semiconductor industry, contribute to challenging engineering problems, and continuously develop the skills required to become a proficient Physical Design Engineer.
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Intern at Emertex, Jul 2023 - Oct 2023 · 4 mos, Banglore, Embedded Systems Intern — Emertxe • Supported software development lifecycle activities including debugging and testing workflows • Structured and analyzed technical logs to assist troubleshooting • Participated in integration and functional testing
Master of Engineering, VLSI, Gandhi Institute of Technology and Management (GITAM)
Bachelor of Technology, Brindavan College
github: https://github.com/astra39521