Immediate Joiner |Staff Engineer (R&D) at Synopsys | C++ Product Engineering | Production Systems, Debugging & Platform Modernization




Mumbai, Maharashtra, India

Centre for Development of Advanced Computing (C-DAC)

Bachelor of Engineering (BE), Computer Science Engineering
Shri Dharmasthala Manjunatheshwara College of Engineering and Technology (SDMCET)
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Staff Software Engineer | Systems Programming (C/C++) | Cybersecurity | Python/Go & AI Tooling Passionate Staff Engineer at Synopsys with 9 years of experience building and sustaining complex enterprise software used in semiconductor manufacturing and yield analysis. Proficient in high-performance C++ desktop applications with a keen eye for deep production problems, system stability, and long-term maintainability. Dedicated to enhancing engineering quality through comprehensive debugging, static code analysis, and proactive platform modernization.
Mumbai Metropolitan Region
Staff Engineer at Synopsys Inc, Jan 2025 - Present · 1 yr 6 mos, • Integrated GitHub Copilot into daily development workflow, reducing repetitive coding effort by ~30%, accelerating feature delivery, and decreasing code review cycles. • Led cross-functional design discussions & code reviews, improving team code quality standards and driving scalable architecture decisions. • Triaged and resolved high-priority production defects, performing root cause analysis and implementing fixes that improved platform stability and user experience. • Delivered new features aligned with business requirements, enhancing the Odyssey Yield Management System for global semiconductor fabs.
R&D Engineering, Sr Engineer at Synopsys Inc, Feb 2024 - Dec 2024 · 11 mos, • Maintained and enhanced a live production system by triaging, debugging, and resolving critical customer-reported defects, improving platform reliability. • Conducted Coverity static code analysis, identifying and eliminating vulnerabilities and potential runtime errors pre-release. • Delivered feature upgrades that improved system performance and usability, contributing to higher customer satisfaction and reduced support escalations.
R&D Engineer, II at Synopsys Inc, Jan 2021 - Jan 2024 · 3 yrs 1 mo, • Designed and implemented interactive MFC/WIN32 UI modules for yield tracking, defect classification, and data visualization, enabling fab engineers to analyse defects efficiently. • Built high-performance C++ modules using STL containers, algorithms, MFC, and WIN32 APIs to support defect data processing workflows across multiple product features. • Investigated and resolved production-impacting defects using logs and stack traces; added new features based on user feedback, improving the platform’s analytical capabilities.
R&D Engineer (Intern) at Synopsys Inc, Feb 2015 - Feb 2017 · 2 yrs 1 mo, Mumbai, Maharashtra, India, • Introduced Coverity static analysis to the team, establishing a mandatory pre-release quality gate that reduced post-release defect density measurably. • Integrated IBM PurifyPlus memory profiler, detecting and eliminating critical memory leaks, noticeably improving application stability and reducing production crashes. • Built and debugged C++/MFC application modules across SDLC, creating reusable object-oriented components that improved team productivity and software maintainability.
Centre for Development of Advanced Computing (C-DAC)
Bachelor of Engineering (BE), Computer Science Engineering, Shri Dharmasthala Manjunatheshwara College of Engineering and Technology (SDMCET)