---
title: "Anuja Marathe - Ethernet IP Design Engineer in Hyderabad | Tal"
description: "Meet Anuja Marathe, IP Design Engineer @AMD | Ex-Microchip Technology | M.Tech (CEN) @NITK Surathkal based in Hyderabad. AI stack includes cursor and claudecode."
image: "https://tal.club/meet/anuja-marathe/share-image"
---

# Anuja Marathe on Tal

## Headline

IP Design Engineer @AMD \| Ex\-Microchip Technology \| M\.Tech \(CEN\) @NITK Surathkal

## About

Currently working as Ethernet IP Design Engineer and previously worked as FPGA Engineer II at Microchip Technology Inc\. and, I've harnessed my M\.Tech in Communication Engineering and Networking to contribute significantly to our team's projects\. With expertise in Microchip Libero, PNR, and Synthesis, I've built upon the solid foundation established during my Bachelor's in Electronics and Telecommunication Engineering\. Since transitioning from an intern to a full\-time engineer, we've collaborated on intricate hardware designs that have reinforced our company's innovative edge\. My core competencies lie in FPGA design and RTL design and implementation, where I leverage my educational background to tackle complex problems and drive advancements in our technology solutions\.

## Location

Hyderabad

## AI stack

cursor

claudecode

## Work experience

Ethernet IP Design Engineer at AMD, Apr 2025 \- Present · 1 yr 5 mos, Hyderabad, Telangana, India, In my role at AMD, I contributed to the integration and validation of Ethernet IP features, ensuring high\-quality performance\. I executed synthesis and implementation flows, debugged RTL issues, and performed hardware bring\-up on the Versal Adaptive SoC Evaluation Board\. My efforts included collaborating with cross\-functional teams to resolve customer issues and enhance product reliability\.

Application Engineer at Microchip Technology Inc\., Jul 2023 \- May 2025 · 1 yr 11 mos, Hyderabad, Telangana, India, In my role at Microchip Technology Inc\., I provided expert application support for FPGA\-based designs, addressing customer issues and enhancing product integration\. I collaborated closely with customers to ensure timely solutions and developed extensive technical documentation to facilitate customer success\. My work involved deep technical analysis and system\-level debugging to resolve complex application challenges\.

Hardware Design Intern at Microchip Technology Inc\., Jan 2023 \- May 2025 · 2 yrs 5 mos, Hyderabad, India

Internship Trainee at Bharat Sanchar Nigam Limited, Mar 2016 \- May 2016 · 3 mos, India

## Education

M\.tech, Communication Engineering and Networking, National Institute of Technology Karnataka

Bachelor of Engineering, Electronics and Telecommunication Engineering, K\.K\.Wagh Education Societys College of Engineering, Nashik

[View the original profile](https://tal.club/meet/anuja-marathe)

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